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sdhci_fsl_fdt: Fix pulse width errata application

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The errata has to be applied every time after SDHCI_RESET_ALL is done.
Move it from attach to the custom reset routine.

Reviewed by: wma, mmel
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D33981
This commit is contained in:
Kornel Duleba 2022-01-14 12:21:51 +01:00 committed by Wojciech Macek
parent de08b5167b
commit a974a7bcdf
1 changed files with 10 additions and 10 deletions
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20
sys/dev/sdhci/sdhci_fsl_fdt.c
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@ -885,16 +885,6 @@ sdhci_fsl_fdt_attach(device_t dev)
sc->slot.max_clk = sc->maxclk_hz;
sc->gpio = sdhci_fdt_gpio_setup(dev, &sc->slot);
/*
* Pulse width detection is not reliable on some boards. Perform
* workaround by clearing register's bit according to errata.
*/
if (sc->soc_data->errata & SDHCI_FSL_UNRELIABLE_PULSE_DET) {
val = RD4(sc, SDHCI_FSL_DLLCFG1);
val &= ~SDHCI_FSL_DLLCFG1_PULSE_STRETCH;
WR4(sc, SDHCI_FSL_DLLCFG1, val);
}
/*
* Set the buffer watermark level to 128 words (512 bytes) for both
* read and write. The hardware has a restriction that when the read or
@ -1028,6 +1018,16 @@ sdhci_fsl_fdt_reset(device_t dev, struct sdhci_slot *slot, uint8_t mask)
WR4(sc, SDHCI_FSL_TBCTL, val);
}
/*
* Pulse width detection is not reliable on some boards. Perform
* workaround by clearing register's bit according to errata.
*/
if (sc->soc_data->errata & SDHCI_FSL_UNRELIABLE_PULSE_DET) {
val = RD4(sc, SDHCI_FSL_DLLCFG1);
val &= ~SDHCI_FSL_DLLCFG1_PULSE_STRETCH;
WR4(sc, SDHCI_FSL_DLLCFG1, val);
}
sc->flags &= ~SDHCI_FSL_HS400_DONE;
}