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ARM: Set UNAL_ENABLE bit in SCTLR CP15 register. This bit is RAO/SBOP

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for ARMv7. For ARMv6, it controls ARMv5 compatible alignment support.
This bit have no effect until unaligned access is enabled.
This commit is contained in:
Michal Meloun 2016-02-04 14:02:42 +00:00
parent f196c10421
commit a65bd3c84b
1 changed files with 2 additions and 2 deletions
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4
sys/arm/arm/locore-v6.S
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@ -132,9 +132,9 @@ ASENTRY_NP(_start)
bic r7, #CPU_CONTROL_DC_ENABLE
bic r7, #CPU_CONTROL_MMU_ENABLE
bic r7, #CPU_CONTROL_IC_ENABLE
bic r7, #CPU_CONTROL_UNAL_ENABLE
bic r7, #CPU_CONTROL_BPRD_ENABLE
bic r7, #CPU_CONTROL_SW_ENABLE
orr r7, #CPU_CONTROL_UNAL_ENABLE
orr r7, #CPU_CONTROL_AFLT_ENABLE
orr r7, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r7)
@ -456,9 +456,9 @@ ASENTRY_NP(mpentry)
bic r0, #CPU_CONTROL_MMU_ENABLE
bic r0, #CPU_CONTROL_DC_ENABLE
bic r0, #CPU_CONTROL_IC_ENABLE
bic r0, #CPU_CONTROL_UNAL_ENABLE
bic r0, #CPU_CONTROL_BPRD_ENABLE
bic r0, #CPU_CONTROL_SW_ENABLE
orr r0, #CPU_CONTROL_UNAL_ENABLE
orr r0, #CPU_CONTROL_AFLT_ENABLE
orr r0, #CPU_CONTROL_VECRELOC
mcr CP15_SCTLR(r0)