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https://github.com/opnsense/src.git
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mgb: sync with version in main
This is a combination of 7 commits. mgb: update Microchip URLs Sponsored by: The FreeBSD Foundation (cherry picked from commit6b25b4a73f) mgb: enable multicast in mgb_init Receive Filtering Engine (RFE) configuration is not yet implemented, and mgb intended to enable all broadcast, multicast, and unicast. However, MGB_RFE_ALLOW_MULTICAST was missed (MGB_RFE_ALLOW_UNICAST was included twice). MFC after: 1 week Fixes:8890ab7758("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation (cherry picked from commitecac5c2928) mgb: Do not KASSERT on error in mgb_init There's not much we can do if mii_mediachg() fails, but KASSERT is not appropriate. MFC after: 1 week Fixes:8890ab7758("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation (cherry picked from commit8b889b8953) mgb: Staticize devclass and iflib structs (as is typical) MFC after: 1 week Fixes:8890ab7758("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation (cherry picked from commitc83ae596f3) mgb: Apply some style(9) Add parens around return values, rewrap lines MFC after: 1 week Fixes:8890ab7758("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation (cherry picked from commit820da5820e) mgb: Fix DEBUG (and LINT) build Sponsored by: The FreeBSD Foundation (cherry picked from commit5f07d7fe40) mgb: Fix nop admin interrupt handling Previously mgb_admin_intr printed a diagnostic message if no interrupt status bits were set, but it's not valid to call device_printf() from a filter. Just drop the message as it has no user-facing value. Also return FILTER_STRAY in this case - there is nothing further for the driver to do. Reviewed by: kbowling MFC after: 1 week Fixes:8890ab7758("Introduce if_mgb driver...") Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D32231 (cherry picked from commit1ad2d87778)
This commit is contained in:
Ed Maste
parent
b3fb4c60c5
commit
9130e0ace0
1 changed files with 47 additions and 59 deletions
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@ -34,9 +34,9 @@ __FBSDID("$FreeBSD$");
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* Microchip LAN7430/LAN7431 PCIe to Gigabit Ethernet Controller driver.
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*
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* Product information:
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* LAN7430 https://www.microchip.com/wwwproducts/en/LAN7430
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* LAN7430 https://www.microchip.com/en-us/product/LAN7430
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* - Integrated IEEE 802.3 compliant PHY
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* LAN7431 https://www.microchip.com/wwwproducts/en/LAN7431
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* LAN7431 https://www.microchip.com/en-us/product/LAN7431
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* - RGMII Interface
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*
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* This driver uses the iflib interface and the default 'ukphy' PHY driver.
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@ -206,7 +206,7 @@ static driver_t mgb_driver = {
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"mgb", mgb_methods, sizeof(struct mgb_softc)
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};
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devclass_t mgb_devclass;
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static devclass_t mgb_devclass;
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DRIVER_MODULE(mgb, pci, mgb_driver, mgb_devclass, NULL, NULL);
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IFLIB_PNP_INFO(pci, mgb, mgb_vendor_info_array);
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MODULE_VERSION(mgb, 1);
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@ -270,7 +270,7 @@ static driver_t mgb_iflib_driver = {
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"mgb", mgb_iflib_methods, sizeof(struct mgb_softc)
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};
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struct if_txrx mgb_txrx = {
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static struct if_txrx mgb_txrx = {
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.ift_txd_encap = mgb_isc_txd_encap,
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.ift_txd_flush = mgb_isc_txd_flush,
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.ift_txd_credits_update = mgb_isc_txd_credits_update,
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@ -282,7 +282,7 @@ struct if_txrx mgb_txrx = {
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.ift_legacy_intr = mgb_legacy_intr
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};
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struct if_shared_ctx mgb_sctx_init = {
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static struct if_shared_ctx mgb_sctx_init = {
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.isc_magic = IFLIB_MAGIC,
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.isc_q_align = PAGE_SIZE,
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@ -397,8 +397,7 @@ mgb_attach_pre(if_ctx_t ctx)
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goto fail;
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}
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switch (pci_get_device(sc->dev))
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{
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switch (pci_get_device(sc->dev)) {
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case MGB_LAN7430_DEVICE_ID:
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phyaddr = 1;
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break;
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@ -556,7 +555,7 @@ mgb_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int ntxqs,
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rdata->head_wb = (uint32_t *) vaddrs[q * ntxqs + 1];
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rdata->head_wb_bus_addr = paddrs[q * ntxqs + 1];
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}
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return 0;
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return (0);
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}
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static int
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@ -580,7 +579,7 @@ mgb_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int nrxqs,
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rdata->head_wb = (uint32_t *) vaddrs[q * nrxqs + 1];
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rdata->head_wb_bus_addr = paddrs[q * nrxqs + 1];
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}
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return 0;
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return (0);
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}
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static void
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@ -611,11 +610,14 @@ mgb_init(if_ctx_t ctx)
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CSR_CLEAR_REG(sc, MGB_RFE_CTL, MGB_RFE_ALLOW_PERFECT_FILTER);
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CSR_UPDATE_REG(sc, MGB_RFE_CTL,
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MGB_RFE_ALLOW_BROADCAST |
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MGB_RFE_ALLOW_UNICAST |
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MGB_RFE_ALLOW_MULTICAST |
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MGB_RFE_ALLOW_UNICAST);
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error = mii_mediachg(miid);
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KASSERT(!error, ("mii_mediachg returned: %d", error));
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/* Not much we can do if this fails. */
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if (error)
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device_printf(sc->dev, "%s: mii_mediachg returned %d", __func__,
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error);
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}
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#ifdef DEBUG
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@ -691,7 +693,6 @@ mgb_dump_some_stats(struct mgb_softc *sc)
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i, sc->tx_ring_data.ring[i].addr.high,
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i, sc->tx_ring_data.ring[i].sts);
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device_printf(sc->dev, "==== DUMP_TX_DMA_RAM ====\n");
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int i;
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CSR_WRITE_REG(sc, 0x24, 0xF); // DP_SEL & TX_RAM_0
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for (i = 0; i < 128; i++) {
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CSR_WRITE_REG(sc, 0x2C, i); // DP_ADDR
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@ -778,25 +779,15 @@ mgb_admin_intr(void *xsc)
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intr_en = CSR_READ_REG(sc, MGB_INTR_ENBL_SET);
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intr_sts &= intr_en;
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/*
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* NOTE: Debugging printfs here
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* will likely cause interrupt test failure.
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*/
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/* TODO: shouldn't continue if suspended */
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if ((intr_sts & MGB_INTR_STS_ANY) == 0)
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{
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device_printf(sc->dev, "non-mgb interrupt triggered.\n");
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return (FILTER_SCHEDULE_THREAD);
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}
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if ((intr_sts & MGB_INTR_STS_TEST) != 0)
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{
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return (FILTER_STRAY);
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if ((intr_sts & MGB_INTR_STS_TEST) != 0) {
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sc->isr_test_flag = true;
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CSR_WRITE_REG(sc, MGB_INTR_STS, MGB_INTR_STS_TEST);
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return (FILTER_HANDLED);
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}
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if ((intr_sts & MGB_INTR_STS_RX_ANY) != 0)
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{
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if ((intr_sts & MGB_INTR_STS_RX_ANY) != 0) {
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for (qidx = 0; qidx < scctx->isc_nrxqsets; qidx++) {
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if ((intr_sts & MGB_INTR_STS_RX(qidx))){
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iflib_rx_intr_deferred(sc->ctx, qidx);
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@ -805,8 +796,7 @@ mgb_admin_intr(void *xsc)
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return (FILTER_HANDLED);
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}
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/* XXX: TX interrupts should not occur */
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if ((intr_sts & MGB_INTR_STS_TX_ANY) != 0)
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{
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if ((intr_sts & MGB_INTR_STS_TX_ANY) != 0) {
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for (qidx = 0; qidx < scctx->isc_ntxqsets; qidx++) {
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if ((intr_sts & MGB_INTR_STS_RX(qidx))) {
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/* clear the interrupt sts and run handler */
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@ -957,7 +947,7 @@ mgb_intr_test(struct mgb_softc *sc)
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MGB_INTR_STS_ANY | MGB_INTR_STS_TEST);
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CSR_WRITE_REG(sc, MGB_INTR_SET, MGB_INTR_STS_TEST);
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if (sc->isr_test_flag)
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return true;
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return (true);
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for (i = 0; i < MGB_TIMEOUT; i++) {
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DELAY(10);
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if (sc->isr_test_flag)
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@ -965,7 +955,7 @@ mgb_intr_test(struct mgb_softc *sc)
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}
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CSR_WRITE_REG(sc, MGB_INTR_ENBL_CLR, MGB_INTR_STS_TEST);
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CSR_WRITE_REG(sc, MGB_INTR_STS, MGB_INTR_STS_TEST);
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return sc->isr_test_flag;
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return (sc->isr_test_flag);
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}
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static int
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@ -1052,7 +1042,7 @@ mgb_isc_txd_credits_update(void *xsc, uint16_t txqid, bool clear)
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while (*(rdata->head_wb) != rdata->last_head) {
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if (!clear)
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return 1;
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return (1);
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txd = &rdata->ring[rdata->last_head];
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memset(txd, 0, sizeof(struct mgb_ring_desc));
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@ -1077,8 +1067,7 @@ mgb_isc_rxd_available(void *xsc, uint16_t rxqid, qidx_t idx, qidx_t budget)
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rdata = &sc->rx_ring_data;
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scctx = iflib_get_softc_ctx(sc->ctx);
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for (; idx != *(rdata->head_wb);
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idx = MGB_NEXT_RING_IDX(idx)) {
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for (; idx != *(rdata->head_wb); idx = MGB_NEXT_RING_IDX(idx)) {
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avail++;
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/* XXX: Could verify desc is device owned here */
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if (avail == budget)
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@ -1113,21 +1102,21 @@ mgb_isc_rxd_pkt_get(void *xsc, if_rxd_info_t ri)
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device_printf(sc->dev,
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"Tried to read descriptor ... "
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"found that it's owned by the driver\n");
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return EINVAL;
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return (EINVAL);
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}
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if ((rxd.ctl & MGB_RX_DESC_CTL_FS) == 0) {
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device_printf(sc->dev,
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"Tried to read descriptor ... "
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"found that FS is not set.\n");
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device_printf(sc->dev, "Tried to read descriptor ... that it FS is not set.\n");
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return EINVAL;
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return (EINVAL);
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}
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/* XXX: Multi-packet support */
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if ((rxd.ctl & MGB_RX_DESC_CTL_LS) == 0) {
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device_printf(sc->dev,
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"Tried to read descriptor ... "
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"found that LS is not set. (Multi-buffer packets not yet supported)\n");
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return EINVAL;
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return (EINVAL);
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}
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ri->iri_frags[0].irf_flid = 0;
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ri->iri_frags[0].irf_idx = rdata->last_head;
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@ -1209,10 +1198,10 @@ mgb_test_bar(struct mgb_softc *sc)
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rev = id_rev & 0xFFFF;
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if (dev_id == MGB_LAN7430_DEVICE_ID ||
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dev_id == MGB_LAN7431_DEVICE_ID) {
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return 0;
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return (0);
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} else {
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device_printf(sc->dev, "ID check failed.\n");
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return ENXIO;
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return (ENXIO);
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}
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}
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@ -1226,7 +1215,7 @@ mgb_alloc_regs(struct mgb_softc *sc)
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sc->regs = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
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&rid, RF_ACTIVE);
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if (sc->regs == NULL)
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return ENXIO;
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return (ENXIO);
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return (0);
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}
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@ -1241,7 +1230,7 @@ mgb_release_regs(struct mgb_softc *sc)
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rman_get_rid(sc->regs), sc->regs);
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sc->regs = NULL;
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pci_disable_busmaster(sc->dev);
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return error;
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return (error);
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}
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static int
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@ -1261,7 +1250,7 @@ mgb_dma_init(struct mgb_softc *sc)
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goto fail;
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fail:
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return error;
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return (error);
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}
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static int
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@ -1391,7 +1380,7 @@ mgb_dma_tx_ring_init(struct mgb_softc *sc, int channel)
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DMAC_START)))
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device_printf(sc->dev, "Failed to start TX DMAC.\n");
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fail:
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return error;
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return (error);
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}
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static int
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@ -1415,7 +1404,7 @@ mgb_dmac_control(struct mgb_softc *sc, int start, int channel,
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*/
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error = mgb_dmac_control(sc, start, channel, DMAC_STOP);
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if (error != 0)
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return error;
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return (error);
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CSR_WRITE_REG(sc, MGB_DMAC_CMD,
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MGB_DMAC_CMD_START(start, channel));
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break;
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@ -1428,7 +1417,7 @@ mgb_dmac_control(struct mgb_softc *sc, int start, int channel,
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MGB_DMAC_CMD_START(start, channel));
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break;
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}
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return error;
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return (error);
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}
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static int
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@ -1439,13 +1428,13 @@ mgb_fct_control(struct mgb_softc *sc, int reg, int channel,
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switch (cmd) {
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case FCT_RESET:
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CSR_WRITE_REG(sc, reg, MGB_FCT_RESET(channel));
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return mgb_wait_for_bits(sc, reg, 0, MGB_FCT_RESET(channel));
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return (mgb_wait_for_bits(sc, reg, 0, MGB_FCT_RESET(channel)));
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case FCT_ENABLE:
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CSR_WRITE_REG(sc, reg, MGB_FCT_ENBL(channel));
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return (0);
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case FCT_DISABLE:
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CSR_WRITE_REG(sc, reg, MGB_FCT_DSBL(channel));
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return mgb_wait_for_bits(sc, reg, 0, MGB_FCT_ENBL(channel));
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return (mgb_wait_for_bits(sc, reg, 0, MGB_FCT_ENBL(channel)));
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}
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}
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@ -1484,7 +1473,7 @@ mgb_hw_init(struct mgb_softc *sc)
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goto fail;
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fail:
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return error;
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return (error);
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}
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static int
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@ -1507,7 +1496,7 @@ mgb_mac_init(struct mgb_softc *sc)
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CSR_UPDATE_REG(sc, MGB_MAC_TX, MGB_MAC_ENBL);
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CSR_UPDATE_REG(sc, MGB_MAC_RX, MGB_MAC_ENBL);
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return MGB_STS_OK;
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return (MGB_STS_OK);
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}
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static int
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@ -1517,7 +1506,7 @@ mgb_phy_reset(struct mgb_softc *sc)
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CSR_UPDATE_BYTE(sc, MGB_PMT_CTL, MGB_PHY_RESET);
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if (mgb_wait_for_bits(sc, MGB_PMT_CTL, 0, MGB_PHY_RESET) ==
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MGB_STS_TIMEOUT)
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return MGB_STS_TIMEOUT;
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return (MGB_STS_TIMEOUT);
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return (mgb_wait_for_bits(sc, MGB_PMT_CTL, MGB_PHY_READY, 0));
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}
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@ -1542,12 +1531,11 @@ mgb_wait_for_bits(struct mgb_softc *sc, int reg, int set_bits, int clear_bits)
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*/
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DELAY(100);
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val = CSR_READ_REG(sc, reg);
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if ((val & set_bits) == set_bits &&
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(val & clear_bits) == 0)
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return MGB_STS_OK;
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if ((val & set_bits) == set_bits && (val & clear_bits) == 0)
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return (MGB_STS_OK);
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} while (i++ < MGB_TIMEOUT);
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return MGB_STS_TIMEOUT;
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return (MGB_STS_TIMEOUT);
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}
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static void
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@ -1568,14 +1556,14 @@ mgb_miibus_readreg(device_t dev, int phy, int reg)
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) ==
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MGB_STS_TIMEOUT)
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return EIO;
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return (EIO);
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mii_access = (phy & MGB_MII_PHY_ADDR_MASK) << MGB_MII_PHY_ADDR_SHIFT;
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mii_access |= (reg & MGB_MII_REG_ADDR_MASK) << MGB_MII_REG_ADDR_SHIFT;
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mii_access |= MGB_MII_BUSY | MGB_MII_READ;
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CSR_WRITE_REG(sc, MGB_MII_ACCESS, mii_access);
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) ==
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MGB_STS_TIMEOUT)
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return EIO;
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return (EIO);
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return (CSR_READ_2_BYTES(sc, MGB_MII_DATA));
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}
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@ -1587,9 +1575,9 @@ mgb_miibus_writereg(device_t dev, int phy, int reg, int data)
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sc = iflib_get_softc(device_get_softc(dev));
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS,
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0, MGB_MII_BUSY) == MGB_STS_TIMEOUT)
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return EIO;
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) ==
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MGB_STS_TIMEOUT)
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return (EIO);
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mii_access = (phy & MGB_MII_PHY_ADDR_MASK) << MGB_MII_PHY_ADDR_SHIFT;
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mii_access |= (reg & MGB_MII_REG_ADDR_MASK) << MGB_MII_REG_ADDR_SHIFT;
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mii_access |= MGB_MII_BUSY | MGB_MII_WRITE;
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@ -1597,8 +1585,8 @@ mgb_miibus_writereg(device_t dev, int phy, int reg, int data)
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CSR_WRITE_REG(sc, MGB_MII_ACCESS, mii_access);
|
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) ==
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MGB_STS_TIMEOUT)
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return EIO;
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return 0;
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return (EIO);
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return (0);
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}
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||||
/* XXX: May need to lock these up */
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Reference in a new issue