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https://github.com/opnsense/src.git
synced 2026-05-28 04:12:45 -04:00
mgb: Apply some style(9)
Add parens around return values, rewrap lines
MFC after: 1 week
Fixes: 8890ab7758 ("Introduce if_mgb driver...")
Sponsored by: The FreeBSD Foundation
This commit is contained in:
Ed Maste
parent
0b159faaca
commit
820da5820e
1 changed files with 37 additions and 44 deletions
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@ -397,8 +397,7 @@ mgb_attach_pre(if_ctx_t ctx)
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goto fail;
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}
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switch (pci_get_device(sc->dev))
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{
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switch (pci_get_device(sc->dev)) {
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case MGB_LAN7430_DEVICE_ID:
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phyaddr = 1;
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break;
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@ -556,7 +555,7 @@ mgb_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int ntxqs,
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rdata->head_wb = (uint32_t *) vaddrs[q * ntxqs + 1];
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rdata->head_wb_bus_addr = paddrs[q * ntxqs + 1];
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}
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return 0;
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return (0);
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}
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static int
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@ -580,7 +579,7 @@ mgb_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs, uint64_t *paddrs, int nrxqs,
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rdata->head_wb = (uint32_t *) vaddrs[q * nrxqs + 1];
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rdata->head_wb_bus_addr = paddrs[q * nrxqs + 1];
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}
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return 0;
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return (0);
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}
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static void
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@ -787,19 +786,16 @@ mgb_admin_intr(void *xsc)
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*/
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/* TODO: shouldn't continue if suspended */
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if ((intr_sts & MGB_INTR_STS_ANY) == 0)
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{
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if ((intr_sts & MGB_INTR_STS_ANY) == 0) {
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device_printf(sc->dev, "non-mgb interrupt triggered.\n");
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return (FILTER_SCHEDULE_THREAD);
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}
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if ((intr_sts & MGB_INTR_STS_TEST) != 0)
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{
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if ((intr_sts & MGB_INTR_STS_TEST) != 0) {
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sc->isr_test_flag = true;
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CSR_WRITE_REG(sc, MGB_INTR_STS, MGB_INTR_STS_TEST);
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return (FILTER_HANDLED);
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}
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if ((intr_sts & MGB_INTR_STS_RX_ANY) != 0)
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{
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if ((intr_sts & MGB_INTR_STS_RX_ANY) != 0) {
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for (qidx = 0; qidx < scctx->isc_nrxqsets; qidx++) {
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if ((intr_sts & MGB_INTR_STS_RX(qidx))){
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iflib_rx_intr_deferred(sc->ctx, qidx);
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@ -808,8 +804,7 @@ mgb_admin_intr(void *xsc)
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return (FILTER_HANDLED);
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}
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/* XXX: TX interrupts should not occur */
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if ((intr_sts & MGB_INTR_STS_TX_ANY) != 0)
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{
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if ((intr_sts & MGB_INTR_STS_TX_ANY) != 0) {
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for (qidx = 0; qidx < scctx->isc_ntxqsets; qidx++) {
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if ((intr_sts & MGB_INTR_STS_RX(qidx))) {
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/* clear the interrupt sts and run handler */
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@ -960,7 +955,7 @@ mgb_intr_test(struct mgb_softc *sc)
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MGB_INTR_STS_ANY | MGB_INTR_STS_TEST);
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CSR_WRITE_REG(sc, MGB_INTR_SET, MGB_INTR_STS_TEST);
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if (sc->isr_test_flag)
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return true;
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return (true);
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for (i = 0; i < MGB_TIMEOUT; i++) {
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DELAY(10);
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if (sc->isr_test_flag)
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@ -968,7 +963,7 @@ mgb_intr_test(struct mgb_softc *sc)
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}
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CSR_WRITE_REG(sc, MGB_INTR_ENBL_CLR, MGB_INTR_STS_TEST);
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CSR_WRITE_REG(sc, MGB_INTR_STS, MGB_INTR_STS_TEST);
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return sc->isr_test_flag;
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return (sc->isr_test_flag);
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}
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static int
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@ -1055,7 +1050,7 @@ mgb_isc_txd_credits_update(void *xsc, uint16_t txqid, bool clear)
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while (*(rdata->head_wb) != rdata->last_head) {
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if (!clear)
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return 1;
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return (1);
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txd = &rdata->ring[rdata->last_head];
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memset(txd, 0, sizeof(struct mgb_ring_desc));
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@ -1080,8 +1075,7 @@ mgb_isc_rxd_available(void *xsc, uint16_t rxqid, qidx_t idx, qidx_t budget)
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rdata = &sc->rx_ring_data;
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scctx = iflib_get_softc_ctx(sc->ctx);
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for (; idx != *(rdata->head_wb);
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idx = MGB_NEXT_RING_IDX(idx)) {
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for (; idx != *(rdata->head_wb); idx = MGB_NEXT_RING_IDX(idx)) {
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avail++;
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/* XXX: Could verify desc is device owned here */
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if (avail == budget)
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@ -1116,21 +1110,21 @@ mgb_isc_rxd_pkt_get(void *xsc, if_rxd_info_t ri)
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device_printf(sc->dev,
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"Tried to read descriptor ... "
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"found that it's owned by the driver\n");
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return EINVAL;
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return (EINVAL);
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}
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if ((rxd.ctl & MGB_RX_DESC_CTL_FS) == 0) {
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device_printf(sc->dev,
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"Tried to read descriptor ... "
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"found that FS is not set.\n");
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device_printf(sc->dev, "Tried to read descriptor ... that it FS is not set.\n");
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return EINVAL;
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return (EINVAL);
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}
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/* XXX: Multi-packet support */
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if ((rxd.ctl & MGB_RX_DESC_CTL_LS) == 0) {
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device_printf(sc->dev,
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"Tried to read descriptor ... "
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"found that LS is not set. (Multi-buffer packets not yet supported)\n");
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return EINVAL;
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return (EINVAL);
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}
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ri->iri_frags[0].irf_flid = 0;
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ri->iri_frags[0].irf_idx = rdata->last_head;
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@ -1212,10 +1206,10 @@ mgb_test_bar(struct mgb_softc *sc)
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rev = id_rev & 0xFFFF;
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if (dev_id == MGB_LAN7430_DEVICE_ID ||
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dev_id == MGB_LAN7431_DEVICE_ID) {
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return 0;
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return (0);
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} else {
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device_printf(sc->dev, "ID check failed.\n");
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return ENXIO;
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return (ENXIO);
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}
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}
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@ -1229,7 +1223,7 @@ mgb_alloc_regs(struct mgb_softc *sc)
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sc->regs = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
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&rid, RF_ACTIVE);
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if (sc->regs == NULL)
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return ENXIO;
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return (ENXIO);
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return (0);
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}
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@ -1244,7 +1238,7 @@ mgb_release_regs(struct mgb_softc *sc)
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rman_get_rid(sc->regs), sc->regs);
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sc->regs = NULL;
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pci_disable_busmaster(sc->dev);
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return error;
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return (error);
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}
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static int
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@ -1264,7 +1258,7 @@ mgb_dma_init(struct mgb_softc *sc)
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goto fail;
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fail:
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return error;
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return (error);
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}
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static int
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@ -1394,7 +1388,7 @@ mgb_dma_tx_ring_init(struct mgb_softc *sc, int channel)
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DMAC_START)))
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device_printf(sc->dev, "Failed to start TX DMAC.\n");
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fail:
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return error;
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return (error);
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}
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static int
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@ -1418,7 +1412,7 @@ mgb_dmac_control(struct mgb_softc *sc, int start, int channel,
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*/
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error = mgb_dmac_control(sc, start, channel, DMAC_STOP);
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if (error != 0)
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return error;
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return (error);
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CSR_WRITE_REG(sc, MGB_DMAC_CMD,
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MGB_DMAC_CMD_START(start, channel));
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break;
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@ -1431,7 +1425,7 @@ mgb_dmac_control(struct mgb_softc *sc, int start, int channel,
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MGB_DMAC_CMD_START(start, channel));
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break;
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}
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return error;
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return (error);
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}
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static int
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@ -1442,13 +1436,13 @@ mgb_fct_control(struct mgb_softc *sc, int reg, int channel,
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switch (cmd) {
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case FCT_RESET:
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CSR_WRITE_REG(sc, reg, MGB_FCT_RESET(channel));
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return mgb_wait_for_bits(sc, reg, 0, MGB_FCT_RESET(channel));
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return (mgb_wait_for_bits(sc, reg, 0, MGB_FCT_RESET(channel)));
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case FCT_ENABLE:
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CSR_WRITE_REG(sc, reg, MGB_FCT_ENBL(channel));
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return (0);
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case FCT_DISABLE:
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CSR_WRITE_REG(sc, reg, MGB_FCT_DSBL(channel));
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return mgb_wait_for_bits(sc, reg, 0, MGB_FCT_ENBL(channel));
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return (mgb_wait_for_bits(sc, reg, 0, MGB_FCT_ENBL(channel)));
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}
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}
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@ -1487,7 +1481,7 @@ mgb_hw_init(struct mgb_softc *sc)
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goto fail;
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fail:
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return error;
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return (error);
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}
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static int
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@ -1510,7 +1504,7 @@ mgb_mac_init(struct mgb_softc *sc)
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CSR_UPDATE_REG(sc, MGB_MAC_TX, MGB_MAC_ENBL);
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CSR_UPDATE_REG(sc, MGB_MAC_RX, MGB_MAC_ENBL);
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return MGB_STS_OK;
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return (MGB_STS_OK);
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}
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static int
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@ -1520,7 +1514,7 @@ mgb_phy_reset(struct mgb_softc *sc)
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CSR_UPDATE_BYTE(sc, MGB_PMT_CTL, MGB_PHY_RESET);
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if (mgb_wait_for_bits(sc, MGB_PMT_CTL, 0, MGB_PHY_RESET) ==
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MGB_STS_TIMEOUT)
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return MGB_STS_TIMEOUT;
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return (MGB_STS_TIMEOUT);
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return (mgb_wait_for_bits(sc, MGB_PMT_CTL, MGB_PHY_READY, 0));
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}
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@ -1545,12 +1539,11 @@ mgb_wait_for_bits(struct mgb_softc *sc, int reg, int set_bits, int clear_bits)
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*/
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DELAY(100);
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val = CSR_READ_REG(sc, reg);
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if ((val & set_bits) == set_bits &&
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(val & clear_bits) == 0)
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return MGB_STS_OK;
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if ((val & set_bits) == set_bits && (val & clear_bits) == 0)
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return (MGB_STS_OK);
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} while (i++ < MGB_TIMEOUT);
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return MGB_STS_TIMEOUT;
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return (MGB_STS_TIMEOUT);
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}
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static void
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@ -1571,14 +1564,14 @@ mgb_miibus_readreg(device_t dev, int phy, int reg)
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) ==
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MGB_STS_TIMEOUT)
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return EIO;
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return (EIO);
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mii_access = (phy & MGB_MII_PHY_ADDR_MASK) << MGB_MII_PHY_ADDR_SHIFT;
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mii_access |= (reg & MGB_MII_REG_ADDR_MASK) << MGB_MII_REG_ADDR_SHIFT;
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mii_access |= MGB_MII_BUSY | MGB_MII_READ;
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CSR_WRITE_REG(sc, MGB_MII_ACCESS, mii_access);
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) ==
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MGB_STS_TIMEOUT)
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return EIO;
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return (EIO);
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return (CSR_READ_2_BYTES(sc, MGB_MII_DATA));
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}
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@ -1590,9 +1583,9 @@ mgb_miibus_writereg(device_t dev, int phy, int reg, int data)
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sc = iflib_get_softc(device_get_softc(dev));
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS,
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0, MGB_MII_BUSY) == MGB_STS_TIMEOUT)
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return EIO;
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) ==
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MGB_STS_TIMEOUT)
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return (EIO);
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mii_access = (phy & MGB_MII_PHY_ADDR_MASK) << MGB_MII_PHY_ADDR_SHIFT;
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mii_access |= (reg & MGB_MII_REG_ADDR_MASK) << MGB_MII_REG_ADDR_SHIFT;
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mii_access |= MGB_MII_BUSY | MGB_MII_WRITE;
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@ -1600,8 +1593,8 @@ mgb_miibus_writereg(device_t dev, int phy, int reg, int data)
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CSR_WRITE_REG(sc, MGB_MII_ACCESS, mii_access);
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if (mgb_wait_for_bits(sc, MGB_MII_ACCESS, 0, MGB_MII_BUSY) ==
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MGB_STS_TIMEOUT)
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return EIO;
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return 0;
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return (EIO);
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return (0);
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}
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/* XXX: May need to lock these up */
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