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ntb: Do not attempt to set write-combining on MWs

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AMD64 pmap assumes ranges will be in the DMAP, which isn't necessarily
true for NTB memory windows (especially 64-bit BARs).

Suggested by:	pmap_change_attr_locked -> kassert_panic
Sponsored by:	EMC / Isilon Storage Division
This commit is contained in:
Conrad Meyer 2015-10-29 04:16:28 +00:00
parent e9497f9bbd
commit 79c1a0199f
1 changed files with 4 additions and 0 deletions
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4
sys/dev/ntb/ntb_hw/ntb_hw.c
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@ -755,9 +755,13 @@ map_memory_window_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar)
save_bar_parameters(bar);
}
#if 0 /* XXX: amd64 pmap_change_attr() assumes region lies in DMAP. */
/* Mark bar region as write combining to improve performance. */
rc = pmap_change_attr((vm_offset_t)bar->vbase, bar->size,
VM_MEMATTR_WRITE_COMBINING);
#else
rc = EINVAL;
#endif
print_map_success(ntb, bar, "mw");
if (rc == 0)
device_printf(ntb->device,