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Writing to the analog registers on the AR9220 (Merlin PCI) seems to require a delay.

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This, along with an initval change which will appear in a subsequent commit,
fixes bus panics that I have been seing with the AR9220 on a Routerstation Pro
(AR7161 MIPS board.)

Obtained from: Linux ath9k
PR: kern/154220
This commit is contained in:
Adrian Chadd 2011-01-27 02:56:03 +00:00
parent 00f0e671ff
commit 6ef699a0a6
1 changed files with 9 additions and 0 deletions
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9
sys/dev/ath/ath_hal/ah.c
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@ -858,6 +858,11 @@ ath_hal_ini_write(struct ath_hal *ah, const HAL_INI_ARRAY *ia,
for (r = 0; r < ia->rows; r++) {
OS_REG_WRITE(ah, HAL_INI_VAL(ia, r, 0),
HAL_INI_VAL(ia, r, col));
/* Analog shift register delay seems needed for Merlin - PR kern/154220 */
if (HAL_INI_VAL(ia, r, 0) >= 0x7800 && HAL_INI_VAL(ia, r, 0) < 0x78a0)
OS_DELAY(100);
DMA_YIELD(regWr);
}
return regWr;
@ -881,6 +886,10 @@ ath_hal_ini_bank_write(struct ath_hal *ah, const HAL_INI_ARRAY *ia,
for (r = 0; r < ia->rows; r++) {
OS_REG_WRITE(ah, HAL_INI_VAL(ia, r, 0), data[r]);
/* Analog shift register delay seems needed for Merlin - PR kern/154220 */
if (HAL_INI_VAL(ia, r, 0) >= 0x7800 && HAL_INI_VAL(ia, r, 0) < 0x78a0)
OS_DELAY(100);
DMA_YIELD(regWr);
}
return regWr;