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Increase the alignment of the rx/tx descriptor ring buffers to 64 bytes.

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16 was the correct alignment for older hardware, but the imx7 requires
64-byte alignment, which is a fine value to use on all systems.

PR:		222634
Submitted by:	sebastian.huber@embedded-brains.de
This commit is contained in:
Ian Lepore 2017-10-28 16:50:23 +00:00
parent 4770655901
commit 2eedde5f72
1 changed files with 1 additions and 1 deletions
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2
sys/dev/ffec/if_ffecreg.h
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@ -317,7 +317,7 @@ struct ffec_hwdesc
* The hardware imposes alignment restrictions on various objects involved in
* DMA transfers. These values are expressed in bytes (not bits).
*/
#define FEC_DESC_RING_ALIGN 16
#define FEC_DESC_RING_ALIGN 64
#define FEC_RXBUF_ALIGN 16
#define FEC_TXBUF_ALIGN 16