From 2eedde5f72ca0a9022d332deef3a34a090307b1c Mon Sep 17 00:00:00 2001 From: Ian Lepore Date: Sat, 28 Oct 2017 16:50:23 +0000 Subject: [PATCH] Increase the alignment of the rx/tx descriptor ring buffers to 64 bytes. 16 was the correct alignment for older hardware, but the imx7 requires 64-byte alignment, which is a fine value to use on all systems. PR: 222634 Submitted by: sebastian.huber@embedded-brains.de --- sys/dev/ffec/if_ffecreg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/dev/ffec/if_ffecreg.h b/sys/dev/ffec/if_ffecreg.h index bc44af3a518..6faa0950881 100644 --- a/sys/dev/ffec/if_ffecreg.h +++ b/sys/dev/ffec/if_ffecreg.h @@ -317,7 +317,7 @@ struct ffec_hwdesc * The hardware imposes alignment restrictions on various objects involved in * DMA transfers. These values are expressed in bytes (not bits). */ -#define FEC_DESC_RING_ALIGN 16 +#define FEC_DESC_RING_ALIGN 64 #define FEC_RXBUF_ALIGN 16 #define FEC_TXBUF_ALIGN 16