mirror of
https://github.com/opnsense/src.git
synced 2026-05-28 04:12:45 -04:00
arm64: Add ISS_MSR_REG for ESR_ELx.ISS values
Add a macro to get the ESR_ELx ISS value when we trap accessing a special register. (cherry picked from commit 09ac9cf8971a0709bb8d5a3a703cd3dbff882b6f)
This commit is contained in:
parent
39ae01d39b
commit
0ea3e76c4b
1 changed files with 6 additions and 0 deletions
|
|
@ -365,6 +365,12 @@
|
|||
#define ISS_MSR_REG_MASK \
|
||||
(ISS_MSR_OP0_MASK | ISS_MSR_OP2_MASK | ISS_MSR_OP1_MASK | \
|
||||
ISS_MSR_CRn_MASK | ISS_MSR_CRm_MASK)
|
||||
#define ISS_MSR_REG(reg) \
|
||||
(((reg ## _op0) << ISS_MSR_OP0_SHIFT) | \
|
||||
((reg ## _op1) << ISS_MSR_OP1_SHIFT) | \
|
||||
((reg ## _CRn) << ISS_MSR_CRn_SHIFT) | \
|
||||
((reg ## _CRm) << ISS_MSR_CRm_SHIFT) | \
|
||||
((reg ## _op2) << ISS_MSR_OP2_SHIFT))
|
||||
|
||||
#define ISS_DATA_ISV_SHIFT 24
|
||||
#define ISS_DATA_ISV (0x01 << ISS_DATA_ISV_SHIFT)
|
||||
|
|
|
|||
Loading…
Reference in a new issue