From 0ea3e76c4baef06c344267209d45c778e2cab04d Mon Sep 17 00:00:00 2001 From: Andrew Turner Date: Wed, 21 Feb 2024 18:10:19 +0000 Subject: [PATCH] arm64: Add ISS_MSR_REG for ESR_ELx.ISS values Add a macro to get the ESR_ELx ISS value when we trap accessing a special register. (cherry picked from commit 09ac9cf8971a0709bb8d5a3a703cd3dbff882b6f) --- sys/arm64/include/armreg.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index f3af9edec4c..6f9e109f4b7 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -365,6 +365,12 @@ #define ISS_MSR_REG_MASK \ (ISS_MSR_OP0_MASK | ISS_MSR_OP2_MASK | ISS_MSR_OP1_MASK | \ ISS_MSR_CRn_MASK | ISS_MSR_CRm_MASK) +#define ISS_MSR_REG(reg) \ + (((reg ## _op0) << ISS_MSR_OP0_SHIFT) | \ + ((reg ## _op1) << ISS_MSR_OP1_SHIFT) | \ + ((reg ## _CRn) << ISS_MSR_CRn_SHIFT) | \ + ((reg ## _CRm) << ISS_MSR_CRm_SHIFT) | \ + ((reg ## _op2) << ISS_MSR_OP2_SHIFT)) #define ISS_DATA_ISV_SHIFT 24 #define ISS_DATA_ISV (0x01 << ISS_DATA_ISV_SHIFT)