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1906. [func] x86 and x86_64 now have seperate atomic locking
implementations.
This commit is contained in:
Mark Andrews
parent
ec8f4b0adb
commit
01b8bc018d
5 changed files with 176 additions and 24 deletions
3
CHANGES
3
CHANGES
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@ -1,3 +1,6 @@
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1906. [func] x86 and x86_64 now have seperate atomic locking
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implementations.
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1905. [bug] Recursive clients soft quota support wasn't working
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as expected. [RT #15103]
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63
configure
vendored
63
configure
vendored
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@ -14,7 +14,7 @@
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# OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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# PERFORMANCE OF THIS SOFTWARE.
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#
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# $Id: configure,v 1.375 2005/07/19 06:00:15 marka Exp $
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# $Id: configure,v 1.376 2005/07/27 04:22:59 marka Exp $
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#
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# Portions Copyright (C) 1996-2001 Nominum, Inc.
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#
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@ -29,7 +29,7 @@
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# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
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# OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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# From configure.in Revision: 1.386 .
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# From configure.in Revision: 1.387 .
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# Guess values for system-dependent variables and create Makefiles.
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# Generated by GNU Autoconf 2.59.
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#
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@ -27527,26 +27527,63 @@ ISC_PLATFORM_USEOSFASM="#undef ISC_PLATFORM_USEOSFASM"
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if test "$use_atomic" = "yes"; then
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echo "$as_me:$LINENO: checking architecture type for atomic operations" >&5
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echo $ECHO_N "checking architecture type for atomic operations... $ECHO_C" >&6
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have_atomic=yes # set default
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case "$host" in
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i[3456]86-*|x86_64-*)
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i[3456]86-*)
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# XXX: some old x86 architectures actually do not support
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# (some of) these operations. Do we need stricter checks?
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# Note: We currently use the same code for both the x86_32 and
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# x86_64 architectures, but there may be a better
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# implementation for the latter.
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have_atomic=yes
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arch=x86_32
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if test "$cross_compiling" = yes; then
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{ { echo "$as_me:$LINENO: error: cannot run test program while cross compiling
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See \`config.log' for more details." >&5
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echo "$as_me: error: cannot run test program while cross compiling
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See \`config.log' for more details." >&2;}
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{ (exit 1); exit 1; }; }
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else
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cat >conftest.$ac_ext <<_ACEOF
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/* confdefs.h. */
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_ACEOF
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cat confdefs.h >>conftest.$ac_ext
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cat >>conftest.$ac_ext <<_ACEOF
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/* end confdefs.h. */
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main() {
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exit((sizeof(void *) == 8) ? 0 : 1);
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}
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_ACEOF
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rm -f conftest$ac_exeext
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if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5
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(eval $ac_link) 2>&5
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ac_status=$?
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echo "$as_me:$LINENO: \$? = $ac_status" >&5
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(exit $ac_status); } && { ac_try='./conftest$ac_exeext'
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{ (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
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(eval $ac_try) 2>&5
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ac_status=$?
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echo "$as_me:$LINENO: \$? = $ac_status" >&5
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(exit $ac_status); }; }; then
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arch=x86_64
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else
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echo "$as_me: program exited with status $ac_status" >&5
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echo "$as_me: failed program was:" >&5
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sed 's/^/| /' conftest.$ac_ext >&5
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( exit $ac_status )
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arch=x86_32
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fi
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rm -f core *.core gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext
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fi
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;;
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x86_64-*)
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arch=x86_64
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;;
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alpha*-*)
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have_atomic=yes
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arch=alpha
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;;
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powerpc-*)
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have_atomic=yes
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arch=powerpc
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;;
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mips-*)
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have_atomic=yes
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arch=mips
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;;
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*)
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@ -27567,6 +27604,10 @@ echo $ECHO_N "checking compiler support for inline assembly code... $ECHO_C" >&6
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if test "X$GCC" = "Xyes"; then
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# GCC's ASM extension always works
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compiler=gcc
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if test $arch = "x86_64"; then
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# We can share the same code for gcc with x86_32
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arch=x86_32
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fi
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else
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case "$host" in
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alpha*-dec-osf*)
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27
configure.in
27
configure.in
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@ -18,7 +18,7 @@ AC_DIVERT_PUSH(1)dnl
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esyscmd([sed "s/^/# /" COPYRIGHT])dnl
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AC_DIVERT_POP()dnl
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AC_REVISION($Revision: 1.386 $)
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AC_REVISION($Revision: 1.387 $)
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AC_INIT(lib/dns/name.c)
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AC_PREREQ(2.13)
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@ -1868,26 +1868,29 @@ esac
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ISC_PLATFORM_USEOSFASM="#undef ISC_PLATFORM_USEOSFASM"
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if test "$use_atomic" = "yes"; then
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AC_MSG_CHECKING([architecture type for atomic operations])
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have_atomic=yes # set default
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case "$host" in
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[i[3456]86-*]|x86_64-*)
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[i[3456]86-*])
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# XXX: some old x86 architectures actually do not support
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# (some of) these operations. Do we need stricter checks?
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# Note: We currently use the same code for both the x86_32 and
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# x86_64 architectures, but there may be a better
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# implementation for the latter.
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have_atomic=yes
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arch=x86_32
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AC_TRY_RUN([
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main() {
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exit((sizeof(void *) == 8) ? 0 : 1);
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}
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],
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[arch=x86_64],
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[arch=x86_32])
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;;
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x86_64-*)
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arch=x86_64
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;;
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alpha*-*)
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have_atomic=yes
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arch=alpha
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;;
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powerpc-*)
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have_atomic=yes
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arch=powerpc
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;;
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mips-*)
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have_atomic=yes
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arch=mips
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;;
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*)
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@ -1906,6 +1909,10 @@ if test "$have_atomic" = "yes"; then
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if test "X$GCC" = "Xyes"; then
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# GCC's ASM extension always works
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compiler=gcc
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if test $arch = "x86_64"; then
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# We can share the same code for gcc with x86_32
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arch=x86_32
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fi
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else
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case "$host" in
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alpha*-dec-osf*)
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@ -14,7 +14,7 @@
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/* $Id: atomic.h,v 1.3 2005/06/16 21:58:00 jinmei Exp $ */
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/* $Id: atomic.h,v 1.4 2005/07/27 04:20:43 marka Exp $ */
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#ifndef ISC_ATOMIC_H
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#define ISC_ATOMIC_H 1
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@ -89,8 +89,6 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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* better to avoid inlining below, since we directly refer to specific
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* positions of the stack frame, which would not actually point to the
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* intended address in the embedded mnemonic.
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*
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* XXX: this code may also not work on a 64-bit (w/o gcc) machine.
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*/
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#include <isc/util.h> /* for 'UNUSED' macro */
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103
lib/isc/x86_64/include/isc/atomic.h
Normal file
103
lib/isc/x86_64/include/isc/atomic.h
Normal file
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@ -0,0 +1,103 @@
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/*
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* Copyright (C) 2005 Internet Systems Consortium, Inc. ("ISC")
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH
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* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT,
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* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
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* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/* $Id: atomic.h,v 1.2 2005/07/27 04:20:43 marka Exp $ */
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#ifndef ISC_ATOMIC_H
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#define ISC_ATOMIC_H 1
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#include <isc/platform.h>
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#include <isc/types.h>
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#ifdef ISC_PLATFORM_USEGCCASM
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/* We share the gcc-version with x86_32 */
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#error "impossible case. check build configuration"
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#elif defined(ISC_PLATFORM_USESTDASM)
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/*
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* The followings are "generic" assembly code which implements the same
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* functionality in case the gcc extension cannot be used. It should be
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* better to avoid inlining below, since we directly refer to specific
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* registers for arguments, which would not actually correspond to the
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* intended address or value in the embedded mnemonic.
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*/
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#include <isc/util.h> /* for 'UNUSED' macro */
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static isc_int32_t
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isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
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UNUSED(p);
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UNUSED(val);
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__asm (
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"movq %rdi, %rdx\n"
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"movl %esi, %eax\n"
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#ifdef ISC_PLATFORM_USETHREADS
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"lock;"
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#endif
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"xadd %eax, (%rdx)\n"
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/*
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* set the return value directly in the register so that we
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* can avoid guessing the correct position in the stack for a
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* local variable.
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*/
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);
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}
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static void
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isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
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UNUSED(p);
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UNUSED(val);
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__asm (
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"movq %rdi, %rax\n"
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"movl %esi, %edx\n"
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#ifdef ISC_PLATFORM_USETHREADS
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"lock;"
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#endif
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"xchgl (%rax), %edx\n"
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);
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}
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static isc_int32_t
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isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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UNUSED(p);
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UNUSED(cmpval);
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UNUSED(val);
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__asm (
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"movl %edx, %ecx\n"
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"movl %esi, %eax\n"
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"movq %rdi, %rdx\n"
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#ifdef ISC_PLATFORM_USETHREADS
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"lock;"
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#endif
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/*
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* If (%rdi) == %eax then (%rdi) := %edx.
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% %eax is set to old (%ecx), which will be the return value.
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*/
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"cmpxchgl %ecx, (%rdx)"
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);
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}
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#else /* !ISC_PLATFORM_USEGCCASM && !ISC_PLATFORM_USESTDASM */
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#error "unsupported compiler. disable atomic ops by --disable-atomic"
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#endif
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#endif /* ISC_ATOMIC_H */
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