diff --git a/CHANGES b/CHANGES index ee698f1ff1..4fe496830a 100644 --- a/CHANGES +++ b/CHANGES @@ -1,3 +1,6 @@ +1906. [func] x86 and x86_64 now have seperate atomic locking + implementations. + 1905. [bug] Recursive clients soft quota support wasn't working as expected. [RT #15103] diff --git a/configure b/configure index efe2ec128c..4b4421a02d 100755 --- a/configure +++ b/configure @@ -14,7 +14,7 @@ # OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR # PERFORMANCE OF THIS SOFTWARE. # -# $Id: configure,v 1.375 2005/07/19 06:00:15 marka Exp $ +# $Id: configure,v 1.376 2005/07/27 04:22:59 marka Exp $ # # Portions Copyright (C) 1996-2001 Nominum, Inc. # @@ -29,7 +29,7 @@ # WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN # ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT # OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -# From configure.in Revision: 1.386 . +# From configure.in Revision: 1.387 . # Guess values for system-dependent variables and create Makefiles. # Generated by GNU Autoconf 2.59. # @@ -27527,26 +27527,63 @@ ISC_PLATFORM_USEOSFASM="#undef ISC_PLATFORM_USEOSFASM" if test "$use_atomic" = "yes"; then echo "$as_me:$LINENO: checking architecture type for atomic operations" >&5 echo $ECHO_N "checking architecture type for atomic operations... $ECHO_C" >&6 + have_atomic=yes # set default case "$host" in - i[3456]86-*|x86_64-*) + i[3456]86-*) # XXX: some old x86 architectures actually do not support # (some of) these operations. Do we need stricter checks? - # Note: We currently use the same code for both the x86_32 and - # x86_64 architectures, but there may be a better - # implementation for the latter. - have_atomic=yes - arch=x86_32 +if test "$cross_compiling" = yes; then + { { echo "$as_me:$LINENO: error: cannot run test program while cross compiling +See \`config.log' for more details." >&5 +echo "$as_me: error: cannot run test program while cross compiling +See \`config.log' for more details." >&2;} + { (exit 1); exit 1; }; } +else + cat >conftest.$ac_ext <<_ACEOF +/* confdefs.h. */ +_ACEOF +cat confdefs.h >>conftest.$ac_ext +cat >>conftest.$ac_ext <<_ACEOF +/* end confdefs.h. */ + +main() { + exit((sizeof(void *) == 8) ? 0 : 1); +} + +_ACEOF +rm -f conftest$ac_exeext +if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5 + (eval $ac_link) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } && { ac_try='./conftest$ac_exeext' + { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5 + (eval $ac_try) 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); }; }; then + arch=x86_64 +else + echo "$as_me: program exited with status $ac_status" >&5 +echo "$as_me: failed program was:" >&5 +sed 's/^/| /' conftest.$ac_ext >&5 + +( exit $ac_status ) +arch=x86_32 +fi +rm -f core *.core gmon.out bb.out conftest$ac_exeext conftest.$ac_objext conftest.$ac_ext +fi + ;; + x86_64-*) + arch=x86_64 ;; alpha*-*) - have_atomic=yes arch=alpha ;; powerpc-*) - have_atomic=yes arch=powerpc ;; mips-*) - have_atomic=yes arch=mips ;; *) @@ -27567,6 +27604,10 @@ echo $ECHO_N "checking compiler support for inline assembly code... $ECHO_C" >&6 if test "X$GCC" = "Xyes"; then # GCC's ASM extension always works compiler=gcc + if test $arch = "x86_64"; then + # We can share the same code for gcc with x86_32 + arch=x86_32 + fi else case "$host" in alpha*-dec-osf*) diff --git a/configure.in b/configure.in index 21d35843aa..8d61335b25 100644 --- a/configure.in +++ b/configure.in @@ -18,7 +18,7 @@ AC_DIVERT_PUSH(1)dnl esyscmd([sed "s/^/# /" COPYRIGHT])dnl AC_DIVERT_POP()dnl -AC_REVISION($Revision: 1.386 $) +AC_REVISION($Revision: 1.387 $) AC_INIT(lib/dns/name.c) AC_PREREQ(2.13) @@ -1868,26 +1868,29 @@ esac ISC_PLATFORM_USEOSFASM="#undef ISC_PLATFORM_USEOSFASM" if test "$use_atomic" = "yes"; then AC_MSG_CHECKING([architecture type for atomic operations]) + have_atomic=yes # set default case "$host" in - [i[3456]86-*]|x86_64-*) + [i[3456]86-*]) # XXX: some old x86 architectures actually do not support # (some of) these operations. Do we need stricter checks? - # Note: We currently use the same code for both the x86_32 and - # x86_64 architectures, but there may be a better - # implementation for the latter. - have_atomic=yes - arch=x86_32 +AC_TRY_RUN([ +main() { + exit((sizeof(void *) == 8) ? 0 : 1); +} +], + [arch=x86_64], + [arch=x86_32]) + ;; + x86_64-*) + arch=x86_64 ;; alpha*-*) - have_atomic=yes arch=alpha ;; powerpc-*) - have_atomic=yes arch=powerpc ;; mips-*) - have_atomic=yes arch=mips ;; *) @@ -1906,6 +1909,10 @@ if test "$have_atomic" = "yes"; then if test "X$GCC" = "Xyes"; then # GCC's ASM extension always works compiler=gcc + if test $arch = "x86_64"; then + # We can share the same code for gcc with x86_32 + arch=x86_32 + fi else case "$host" in alpha*-dec-osf*) diff --git a/lib/isc/x86_32/include/isc/atomic.h b/lib/isc/x86_32/include/isc/atomic.h index f123a54479..6b5af60904 100644 --- a/lib/isc/x86_32/include/isc/atomic.h +++ b/lib/isc/x86_32/include/isc/atomic.h @@ -14,7 +14,7 @@ * PERFORMANCE OF THIS SOFTWARE. */ -/* $Id: atomic.h,v 1.3 2005/06/16 21:58:00 jinmei Exp $ */ +/* $Id: atomic.h,v 1.4 2005/07/27 04:20:43 marka Exp $ */ #ifndef ISC_ATOMIC_H #define ISC_ATOMIC_H 1 @@ -89,8 +89,6 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) { * better to avoid inlining below, since we directly refer to specific * positions of the stack frame, which would not actually point to the * intended address in the embedded mnemonic. - * - * XXX: this code may also not work on a 64-bit (w/o gcc) machine. */ #include /* for 'UNUSED' macro */ diff --git a/lib/isc/x86_64/include/isc/atomic.h b/lib/isc/x86_64/include/isc/atomic.h new file mode 100644 index 0000000000..749e410c1b --- /dev/null +++ b/lib/isc/x86_64/include/isc/atomic.h @@ -0,0 +1,103 @@ +/* + * Copyright (C) 2005 Internet Systems Consortium, Inc. ("ISC") + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH + * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT, + * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM + * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE + * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + */ + +/* $Id: atomic.h,v 1.2 2005/07/27 04:20:43 marka Exp $ */ + +#ifndef ISC_ATOMIC_H +#define ISC_ATOMIC_H 1 + +#include +#include + +#ifdef ISC_PLATFORM_USEGCCASM + +/* We share the gcc-version with x86_32 */ +#error "impossible case. check build configuration" + +#elif defined(ISC_PLATFORM_USESTDASM) +/* + * The followings are "generic" assembly code which implements the same + * functionality in case the gcc extension cannot be used. It should be + * better to avoid inlining below, since we directly refer to specific + * registers for arguments, which would not actually correspond to the + * intended address or value in the embedded mnemonic. + */ +#include /* for 'UNUSED' macro */ + +static isc_int32_t +isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) { + UNUSED(p); + UNUSED(val); + + __asm ( + "movq %rdi, %rdx\n" + "movl %esi, %eax\n" +#ifdef ISC_PLATFORM_USETHREADS + "lock;" +#endif + "xadd %eax, (%rdx)\n" + + /* + * set the return value directly in the register so that we + * can avoid guessing the correct position in the stack for a + * local variable. + */ + ); +} + +static void +isc_atomic_store(isc_int32_t *p, isc_int32_t val) { + UNUSED(p); + UNUSED(val); + + __asm ( + "movq %rdi, %rax\n" + "movl %esi, %edx\n" +#ifdef ISC_PLATFORM_USETHREADS + "lock;" +#endif + "xchgl (%rax), %edx\n" + ); +} + +static isc_int32_t +isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) { + UNUSED(p); + UNUSED(cmpval); + UNUSED(val); + + __asm ( + "movl %edx, %ecx\n" + "movl %esi, %eax\n" + "movq %rdi, %rdx\n" + +#ifdef ISC_PLATFORM_USETHREADS + "lock;" +#endif + /* + * If (%rdi) == %eax then (%rdi) := %edx. + % %eax is set to old (%ecx), which will be the return value. + */ + "cmpxchgl %ecx, (%rdx)" + ); +} + +#else /* !ISC_PLATFORM_USEGCCASM && !ISC_PLATFORM_USESTDASM */ + +#error "unsupported compiler. disable atomic ops by --disable-atomic" + +#endif +#endif /* ISC_ATOMIC_H */