mirror of
https://github.com/opnsense/src.git
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2ad32d3a68
Otherwise I get an unused function warning during amd64 kernel builds.
Fixes: a592b5fd9d ("mccomphy: add support for YT8531")
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D50191
409 lines
10 KiB
C
409 lines
10 KiB
C
/*
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* Copyright (c) 2022 Jared McNeill <jmcneill@invisible.ca>
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* Copyright (c) 2022 Soren Schmidt <sos@deepcore.dk>
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* Copyright (c) 2024 Jari Sihvola <jsihv@gmx.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Motorcomm YT8511C/YT8511H/YT8531
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* Integrated 10/100/1000 Gigabit Ethernet phy
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*/
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/errno.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#ifdef FDT
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#include <dev/mii/mii_fdt.h>
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#endif
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#include "miidevs.h"
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#include "miibus_if.h"
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#define MCOMMPHY_YT8511_OUI 0x000000
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#define MCOMMPHY_YT8511_MODEL 0x10
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#define MCOMMPHY_YT8511_REV 0x0a
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#define MCOMMPHY_YT8531_MODEL 0x11
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#define EXT_REG_ADDR 0x1e
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#define EXT_REG_DATA 0x1f
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/* Extended registers */
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#define PHY_CLOCK_GATING_REG 0x0c
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#define RX_CLK_DELAY_EN 0x0001
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#define CLK_25M_SEL 0x0006
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#define CLK_25M_SEL_125M 3
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#define TX_CLK_DELAY_SEL 0x00f0
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#define PHY_SLEEP_CONTROL1_REG 0x27
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#define PLLON_IN_SLP 0x4000
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/* Registers and values for YT8531 */
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#define YT8531_CHIP_CONFIG 0xa001
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#define RXC_DLY_EN (1 << 8)
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#define YT8531_PAD_DRSTR_CFG 0xa010
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#define PAD_RXC_MASK 0x7
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#define PAD_RXC_SHIFT 13
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#define JH7110_RGMII_RXC_STRENGTH 6
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#define YT8531_RGMII_CONFIG1 0xa003
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#define RX_DELAY_SEL_SHIFT 10
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#define RX_DELAY_SEL_MASK 0xf
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#define RXC_DLY_THRESH 2250
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#define RXC_DLY_ADDON 1900
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#define TX_DELAY_SEL_FE_MASK 0xf
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#define TX_DELAY_SEL_FE_SHIFT 4
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#define TX_DELAY_SEL_MASK 0xf
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#define TX_DELAY_SEL_SHIFT 0
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#define TX_CLK_SEL (1 << 14)
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#define INTERNAL_DLY_DIV 150
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#define YT8531_SYNCE_CFG 0xa012
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#define EN_SYNC_E (1 << 6)
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#define LOWEST_SET_BIT(mask) ((((mask) - 1) & (mask)) ^ (mask))
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#define SHIFTIN(x, mask) ((x) * LOWEST_SET_BIT(mask))
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static const struct mii_phydesc mcommphys[] = {
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MII_PHY_DESC(MOTORCOMM, YT8511),
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MII_PHY_DESC(MOTORCOMM2, YT8531),
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MII_PHY_END
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};
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struct mcommphy_softc {
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mii_softc_t mii_sc;
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device_t dev;
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u_int rx_delay_ps;
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u_int tx_delay_ps;
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bool tx_10_inv;
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bool tx_100_inv;
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bool tx_1000_inv;
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};
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static void mcommphy_yt8531_speed_adjustment(struct mii_softc *sc);
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static int
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mcommphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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switch (cmd) {
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case MII_POLLSTAT:
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break;
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case MII_MEDIACHG:
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mii_phy_setmedia(sc);
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break;
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case MII_TICK:
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if (mii_phy_tick(sc) == EJUSTRETURN)
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return (0);
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break;
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}
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/* Update the media status. */
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PHY_STATUS(sc);
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/*
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* For the needs of JH7110 which has two Ethernet devices with
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* different TX inverted configuration depending on speed used
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*/
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if (sc->mii_mpd_model == MCOMMPHY_YT8531_MODEL &&
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(sc->mii_media_active != mii->mii_media_active ||
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sc->mii_media_status != mii->mii_media_status)) {
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mcommphy_yt8531_speed_adjustment(sc);
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}
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/* Callback if something changed. */
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mii_phy_update(sc, cmd);
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return (0);
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}
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static const struct mii_phy_funcs mcommphy_funcs = {
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mcommphy_service,
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ukphy_status,
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mii_phy_reset
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};
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static int
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mcommphy_probe(device_t dev)
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{
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struct mii_attach_args *ma = device_get_ivars(dev);
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/*
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* The YT8511C reports an OUI of 0. Best we can do here is to match
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* exactly the contents of the PHY identification registers.
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*/
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if (MII_OUI(ma->mii_id1, ma->mii_id2) == MCOMMPHY_YT8511_OUI &&
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MII_MODEL(ma->mii_id2) == MCOMMPHY_YT8511_MODEL &&
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MII_REV(ma->mii_id2) == MCOMMPHY_YT8511_REV) {
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device_set_desc(dev, "Motorcomm YT8511 media interface");
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return (BUS_PROBE_DEFAULT);
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}
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/* YT8531 follows a conventional procedure */
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return (mii_phy_dev_probe(dev, mcommphys, BUS_PROBE_DEFAULT));
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}
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static void
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mcommphy_yt8511_setup(struct mii_softc *sc)
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{
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uint16_t oldaddr, data;
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oldaddr = PHY_READ(sc, EXT_REG_ADDR);
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PHY_WRITE(sc, EXT_REG_ADDR, PHY_CLOCK_GATING_REG);
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data = PHY_READ(sc, EXT_REG_DATA);
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data &= ~CLK_25M_SEL;
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data |= SHIFTIN(CLK_25M_SEL_125M, CLK_25M_SEL);
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if (sc->mii_flags & MIIF_RX_DELAY) {
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data |= RX_CLK_DELAY_EN;
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} else {
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data &= ~RX_CLK_DELAY_EN;
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}
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data &= ~TX_CLK_DELAY_SEL;
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if (sc->mii_flags & MIIF_TX_DELAY) {
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data |= SHIFTIN(0xf, TX_CLK_DELAY_SEL);
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} else {
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data |= SHIFTIN(0x2, TX_CLK_DELAY_SEL);
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}
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PHY_WRITE(sc, EXT_REG_DATA, data);
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PHY_WRITE(sc, EXT_REG_ADDR, PHY_SLEEP_CONTROL1_REG);
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data = PHY_READ(sc, EXT_REG_DATA);
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data |= PLLON_IN_SLP;
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PHY_WRITE(sc, EXT_REG_DATA, data);
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PHY_WRITE(sc, EXT_REG_ADDR, oldaddr);
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}
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static void
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mcommphy_yt8531_speed_adjustment(struct mii_softc *sc)
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{
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struct mcommphy_softc *mcomm_sc = (struct mcommphy_softc *)sc;
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struct mii_data *mii = sc->mii_pdata;
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bool tx_clk_inv = false;
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uint16_t reg, oldaddr;
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switch (IFM_SUBTYPE(mii->mii_media_active)) {
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case IFM_1000_T:
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tx_clk_inv = mcomm_sc->tx_1000_inv;
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break;
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case IFM_100_T:
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tx_clk_inv = mcomm_sc->tx_100_inv;
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break;
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case IFM_10_T:
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tx_clk_inv = mcomm_sc->tx_10_inv;
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break;
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}
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oldaddr = PHY_READ(sc, EXT_REG_ADDR);
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PHY_WRITE(sc, EXT_REG_ADDR, YT8531_RGMII_CONFIG1);
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reg = PHY_READ(sc, EXT_REG_DATA);
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if (tx_clk_inv)
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reg |= TX_CLK_SEL;
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else
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reg &= ~TX_CLK_SEL;
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PHY_WRITE(sc, EXT_REG_DATA, reg);
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PHY_WRITE(sc, EXT_REG_ADDR, oldaddr);
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}
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#ifdef FDT
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static int
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mcommphy_yt8531_setup_delay(struct mii_softc *sc)
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{
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struct mcommphy_softc *mcomm_sc = (struct mcommphy_softc *)sc;
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uint16_t reg, oldaddr;
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int rx_delay = 0, tx_delay = 0;
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bool rxc_dly_en_off = false;
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if (mcomm_sc->rx_delay_ps > RXC_DLY_THRESH) {
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rx_delay = (mcomm_sc->rx_delay_ps - RXC_DLY_ADDON) /
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INTERNAL_DLY_DIV;
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} else if (mcomm_sc->rx_delay_ps > 0) {
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rx_delay = mcomm_sc->rx_delay_ps / INTERNAL_DLY_DIV;
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rxc_dly_en_off = true;
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}
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if (mcomm_sc->tx_delay_ps > 0) {
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tx_delay = mcomm_sc->tx_delay_ps / INTERNAL_DLY_DIV;
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}
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oldaddr = PHY_READ(sc, EXT_REG_ADDR);
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/* Modifying Chip Config register */
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PHY_WRITE(sc, EXT_REG_ADDR, YT8531_CHIP_CONFIG);
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reg = PHY_READ(sc, EXT_REG_DATA);
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if (rxc_dly_en_off)
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reg &= ~(RXC_DLY_EN);
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PHY_WRITE(sc, EXT_REG_DATA, reg);
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/* Modifying RGMII Config1 register */
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PHY_WRITE(sc, EXT_REG_ADDR, YT8531_RGMII_CONFIG1);
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reg = PHY_READ(sc, EXT_REG_DATA);
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reg &= ~(RX_DELAY_SEL_MASK << RX_DELAY_SEL_SHIFT);
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reg |= rx_delay << RX_DELAY_SEL_SHIFT;
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reg &= ~(TX_DELAY_SEL_MASK << TX_DELAY_SEL_SHIFT);
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reg |= tx_delay << TX_DELAY_SEL_SHIFT;
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PHY_WRITE(sc, EXT_REG_DATA, reg);
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PHY_WRITE(sc, EXT_REG_ADDR, oldaddr);
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return (0);
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}
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#endif
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static int
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mcommphy_yt8531_setup(struct mii_softc *sc)
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{
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uint16_t reg, oldaddr;
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oldaddr = PHY_READ(sc, EXT_REG_ADDR);
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/* Modifying Pad Drive Strength register */
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PHY_WRITE(sc, EXT_REG_ADDR, YT8531_PAD_DRSTR_CFG);
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reg = PHY_READ(sc, EXT_REG_DATA);
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reg &= ~(PAD_RXC_MASK << PAD_RXC_SHIFT);
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reg |= (JH7110_RGMII_RXC_STRENGTH << PAD_RXC_SHIFT);
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PHY_WRITE(sc, EXT_REG_DATA, reg);
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/* Modifying SyncE Config register */
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PHY_WRITE(sc, EXT_REG_ADDR, YT8531_SYNCE_CFG);
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reg = PHY_READ(sc, EXT_REG_DATA);
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reg &= ~(EN_SYNC_E);
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PHY_WRITE(sc, EXT_REG_DATA, reg);
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PHY_WRITE(sc, EXT_REG_ADDR, oldaddr);
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#ifdef FDT
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if (mcommphy_yt8531_setup_delay(sc) != 0)
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return (ENXIO);
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#endif
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return (0);
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}
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#ifdef FDT
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static void
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mcommphy_fdt_get_config(struct mcommphy_softc *sc)
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{
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mii_fdt_phy_config_t *cfg;
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pcell_t val;
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cfg = mii_fdt_get_config(sc->dev);
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if (OF_hasprop(cfg->phynode, "motorcomm,tx-clk-10-inverted"))
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sc->tx_10_inv = true;
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if (OF_hasprop(cfg->phynode, "motorcomm,tx-clk-100-inverted"))
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sc->tx_100_inv = true;
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if (OF_hasprop(cfg->phynode, "motorcomm,tx-clk-1000-inverted"))
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sc->tx_1000_inv = true;
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/* Grab raw delay values (picoseconds); adjusted later. */
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if (OF_getencprop(cfg->phynode, "rx-internal-delay-ps", &val,
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sizeof(val)) > 0) {
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sc->rx_delay_ps = val;
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}
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if (OF_getencprop(cfg->phynode, "tx-internal-delay-ps", &val,
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sizeof(val)) > 0) {
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sc->tx_delay_ps = val;
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}
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mii_fdt_free_config(cfg);
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}
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#endif
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static int
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mcommphy_attach(device_t dev)
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{
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struct mcommphy_softc *mcomm_sc = device_get_softc(dev);
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mii_softc_t *mii_sc = &mcomm_sc->mii_sc;
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int ret = 0;
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mcomm_sc->dev = dev;
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#ifdef FDT
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mcommphy_fdt_get_config(mcomm_sc);
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#endif
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mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &mcommphy_funcs, 0);
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PHY_RESET(mii_sc);
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if (mii_sc->mii_mpd_model == MCOMMPHY_YT8511_MODEL)
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mcommphy_yt8511_setup(mii_sc);
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else if (mii_sc->mii_mpd_model == MCOMMPHY_YT8531_MODEL)
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ret = mcommphy_yt8531_setup(mii_sc);
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else {
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device_printf(dev, "no PHY model detected\n");
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return (ENXIO);
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}
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if (ret) {
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device_printf(dev, "PHY setup failed, error: %d\n", ret);
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return (ret);
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}
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mii_sc->mii_capabilities = PHY_READ(mii_sc, MII_BMSR) &
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mii_sc->mii_capmask;
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if (mii_sc->mii_capabilities & BMSR_EXTSTAT)
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mii_sc->mii_extcapabilities = PHY_READ(mii_sc, MII_EXTSR);
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device_printf(dev, " ");
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mii_phy_add_media(mii_sc);
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printf("\n");
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MIIBUS_MEDIAINIT(mii_sc->mii_dev);
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return (0);
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}
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static device_method_t mcommphy_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, mcommphy_probe),
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DEVMETHOD(device_attach, mcommphy_attach),
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DEVMETHOD(device_detach, mii_phy_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static driver_t mcommphy_driver = {
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"mcommphy",
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mcommphy_methods,
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sizeof(struct mcommphy_softc)
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};
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DRIVER_MODULE(mcommphy, miibus, mcommphy_driver, 0, 0);
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