Hans Petter Selasky f81d0b43f1 Don't separate the status stage of the XHCI USB control transfers into ... its own job because this breaks the simplified QEMU XHCI TRB parser, which expects the complete USB control transfer as a series of back to back TRBs. The old behaviour is kept under #ifdef in case this change breaks enumeration of any USB devices. PR: 212021 MFC after: 1 week		2016-08-22 19:32:50 +00:00
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at91dci.c
at91dci.h
at91dci_atmelarm.c
at91dci_fdt.c
atmegadci.c	Make a bunch of USB debug SYSCTLs tunable, so that their value(s) can	2015-01-05 15:04:17 +00:00
atmegadci.h
atmegadci_atmelarm.c
avr32dci.c
avr32dci.h
dwc_otg.c	Fix interrupt loop when switching from USB device to USB host mode by	2016-07-04 17:12:22 +00:00
dwc_otg.h	Avoid using the bounce buffer when the source or destination buffer is	2015-11-08 09:37:26 +00:00
dwc_otg_fdt.c
dwc_otg_fdt.h
dwc_otg_hisi.c
dwc_otgreg.h
ehci.c
ehci.h
ehci_fsl.c
ehci_imx.c
ehci_ixp4xx.c	sys/dev: replace comma with semicolon when pertinent.	2016-08-09 19:41:46 +00:00
ehci_mv.c
ehci_pci.c
ehcireg.h
generic_ehci.c	Add a generic EHCI USB driver based on the Allwinner A10 driver. It is ACPI	2016-07-29 08:50:36 +00:00
generic_ohci.c	EXTRES: Add OF node as argument to all <foo>_get_by_ofw_<bar>() functions.	2016-07-10 18:28:15 +00:00
generic_usb_if.m
musb_otg.c
musb_otg.h
musb_otg_atmelarm.c
ohci.c
ohci.h
ohci_pci.c
ohci_s3c24x0.c
ohcireg.h
saf1761_otg.c
saf1761_otg.h
saf1761_otg_boot.c
saf1761_otg_fdt.c
saf1761_otg_reg.h
uhci.c
uhci.h
uhci_pci.c
uhcireg.h
usb_controller.c
uss820dci.c
uss820dci.h
uss820dci_atmelarm.c
xhci.c	Don't separate the status stage of the XHCI USB control transfers into	2016-08-22 19:32:50 +00:00
xhci.h	Fix regression issue with XHCI on 32-bit ARMv7 Armada-38x. Make sure	2016-07-06 10:57:04 +00:00
xhci_mv.c
xhci_pci.c
xhcireg.h	Update the definition for number of scratch pages to match the latest	2016-06-22 09:03:55 +00:00