mirror of
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all of the features in the current working draft of the upcoming C++ standard, provisionally named C++1y. The code generator's performance is greatly increased, and the loop auto-vectorizer is now enabled at -Os and -O2 in addition to -O3. The PowerPC backend has made several major improvements to code generation quality and compile time, and the X86, SPARC, ARM32, Aarch64 and SystemZ backends have all seen major feature work. Release notes for llvm and clang can be found here: <http://llvm.org/releases/3.4/docs/ReleaseNotes.html> <http://llvm.org/releases/3.4/tools/clang/docs/ReleaseNotes.html> MFC after: 1 month
527 lines
15 KiB
TableGen
527 lines
15 KiB
TableGen
//===-- PPCSchedule.td - PowerPC Scheduling Definitions ----*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Functional units across PowerPC chips sets
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//
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def BPU : FuncUnit; // Branch unit
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def SLU : FuncUnit; // Store/load unit
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def SRU : FuncUnit; // special register unit
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def IU1 : FuncUnit; // integer unit 1 (simple)
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def IU2 : FuncUnit; // integer unit 2 (complex)
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def FPU1 : FuncUnit; // floating point unit 1
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def FPU2 : FuncUnit; // floating point unit 2
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def VPU : FuncUnit; // vector permutation unit
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def VIU1 : FuncUnit; // vector integer unit 1 (simple)
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def VIU2 : FuncUnit; // vector integer unit 2 (complex)
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def VFPU : FuncUnit; // vector floating point unit
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//===----------------------------------------------------------------------===//
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// Instruction Itinerary classes used for PowerPC
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//
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def IntSimple : InstrItinClass;
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def IntGeneral : InstrItinClass;
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def IntCompare : InstrItinClass;
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def IntDivD : InstrItinClass;
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def IntDivW : InstrItinClass;
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def IntMFFS : InstrItinClass;
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def IntMFVSCR : InstrItinClass;
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def IntMTFSB0 : InstrItinClass;
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def IntMTSRD : InstrItinClass;
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def IntMulHD : InstrItinClass;
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def IntMulHW : InstrItinClass;
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def IntMulHWU : InstrItinClass;
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def IntMulLI : InstrItinClass;
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def IntRFID : InstrItinClass;
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def IntRotateD : InstrItinClass;
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def IntRotateDI : InstrItinClass;
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def IntRotate : InstrItinClass;
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def IntShift : InstrItinClass;
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def IntTrapD : InstrItinClass;
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def IntTrapW : InstrItinClass;
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def BrB : InstrItinClass;
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def BrCR : InstrItinClass;
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def BrMCR : InstrItinClass;
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def BrMCRX : InstrItinClass;
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def LdStDCBA : InstrItinClass;
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def LdStDCBF : InstrItinClass;
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def LdStDCBI : InstrItinClass;
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def LdStLoad : InstrItinClass;
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def LdStLoadUpd : InstrItinClass;
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def LdStStore : InstrItinClass;
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def LdStStoreUpd : InstrItinClass;
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def LdStDSS : InstrItinClass;
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def LdStICBI : InstrItinClass;
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def LdStLD : InstrItinClass;
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def LdStLDU : InstrItinClass;
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def LdStLDARX : InstrItinClass;
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def LdStLFD : InstrItinClass;
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def LdStLFDU : InstrItinClass;
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def LdStLHA : InstrItinClass;
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def LdStLHAU : InstrItinClass;
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def LdStLMW : InstrItinClass;
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def LdStLVecX : InstrItinClass;
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def LdStLWA : InstrItinClass;
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def LdStLWARX : InstrItinClass;
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def LdStSLBIA : InstrItinClass;
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def LdStSLBIE : InstrItinClass;
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def LdStSTD : InstrItinClass;
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def LdStSTDCX : InstrItinClass;
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def LdStSTDU : InstrItinClass;
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def LdStSTFD : InstrItinClass;
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def LdStSTFDU : InstrItinClass;
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def LdStSTVEBX : InstrItinClass;
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def LdStSTWCX : InstrItinClass;
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def LdStSync : InstrItinClass;
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def SprISYNC : InstrItinClass;
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def SprMFSR : InstrItinClass;
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def SprMTMSR : InstrItinClass;
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def SprMTSR : InstrItinClass;
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def SprTLBSYNC : InstrItinClass;
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def SprMFCR : InstrItinClass;
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def SprMFMSR : InstrItinClass;
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def SprMFSPR : InstrItinClass;
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def SprMFTB : InstrItinClass;
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def SprMTSPR : InstrItinClass;
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def SprMTSRIN : InstrItinClass;
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def SprRFI : InstrItinClass;
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def SprSC : InstrItinClass;
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def FPGeneral : InstrItinClass;
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def FPAddSub : InstrItinClass;
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def FPCompare : InstrItinClass;
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def FPDivD : InstrItinClass;
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def FPDivS : InstrItinClass;
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def FPFused : InstrItinClass;
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def FPRes : InstrItinClass;
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def FPSqrt : InstrItinClass;
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def VecGeneral : InstrItinClass;
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def VecFP : InstrItinClass;
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def VecFPCompare : InstrItinClass;
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def VecComplex : InstrItinClass;
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def VecPerm : InstrItinClass;
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def VecFPRound : InstrItinClass;
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def VecVSL : InstrItinClass;
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def VecVSR : InstrItinClass;
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def SprMTMSRD : InstrItinClass;
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def SprSLIE : InstrItinClass;
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def SprSLBIE : InstrItinClass;
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def SprSLBMTE : InstrItinClass;
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def SprSLBMFEE : InstrItinClass;
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def SprSLBIA : InstrItinClass;
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def SprTLBIEL : InstrItinClass;
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def SprTLBIE : InstrItinClass;
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//===----------------------------------------------------------------------===//
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// Processor instruction itineraries.
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include "PPCScheduleG3.td"
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include "PPCSchedule440.td"
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include "PPCScheduleG4.td"
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include "PPCScheduleG4Plus.td"
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include "PPCScheduleG5.td"
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include "PPCScheduleA2.td"
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include "PPCScheduleE500mc.td"
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include "PPCScheduleE5500.td"
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//===----------------------------------------------------------------------===//
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// Instruction to itinerary class map - When add new opcodes to the supported
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// set, refer to the following table to determine which itinerary class the
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// opcode belongs.
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//
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// opcode itinerary class
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// ====== ===============
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// add IntSimple
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// addc IntGeneral
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// adde IntGeneral
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// addi IntSimple
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// addic IntGeneral
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// addic. IntGeneral
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// addis IntSimple
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// addme IntGeneral
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// addze IntGeneral
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// and IntSimple
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// andc IntSimple
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// andi. IntGeneral
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// andis. IntGeneral
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// b BrB
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// bc BrB
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// bcctr BrB
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// bclr BrB
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// cmp IntCompare
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// cmpi IntCompare
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// cmpl IntCompare
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// cmpli IntCompare
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// cntlzd IntRotateD
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// cntlzw IntGeneral
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// crand BrCR
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// crandc BrCR
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// creqv BrCR
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// crnand BrCR
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// crnor BrCR
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// cror BrCR
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// crorc BrCR
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// crxor BrCR
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// dcba LdStDCBA
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// dcbf LdStDCBF
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// dcbi LdStDCBI
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// dcbst LdStDCBF
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// dcbt LdStLoad
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// dcbtst LdStLoad
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// dcbz LdStDCBF
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// divd IntDivD
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// divdu IntDivD
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// divw IntDivW
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// divwu IntDivW
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// dss LdStDSS
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// dst LdStDSS
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// dstst LdStDSS
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// eciwx LdStLoad
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// ecowx LdStLoad
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// eieio LdStLoad
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// eqv IntSimple
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// extsb IntSimple
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// extsh IntSimple
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// extsw IntSimple
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// fabs FPGeneral
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// fadd FPAddSub
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// fadds FPGeneral
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// fcfid FPGeneral
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// fcmpo FPCompare
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// fcmpu FPCompare
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// fctid FPGeneral
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// fctidz FPGeneral
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// fctiw FPGeneral
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// fctiwz FPGeneral
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// fdiv FPDivD
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// fdivs FPDivS
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// fmadd FPFused
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// fmadds FPGeneral
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// fmr FPGeneral
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// fmsub FPFused
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// fmsubs FPGeneral
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// fmul FPFused
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// fmuls FPGeneral
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// fnabs FPGeneral
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// fneg FPGeneral
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// fnmadd FPFused
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// fnmadds FPGeneral
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// fnmsub FPFused
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// fnmsubs FPGeneral
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// fres FPRes
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// frsp FPGeneral
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// frsqrte FPGeneral
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// fsel FPGeneral
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// fsqrt FPSqrt
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// fsqrts FPSqrt
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// fsub FPAddSub
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// fsubs FPGeneral
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// icbi LdStICBI
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// isync SprISYNC
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// lbz LdStLoad
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// lbzu LdStLoadUpd
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// lbzux LdStLoadUpd
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// lbzx LdStLoad
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// ld LdStLD
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// ldarx LdStLDARX
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// ldu LdStLDU
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// ldux LdStLDU
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// ldx LdStLD
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// lfd LdStLFD
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// lfdu LdStLFDU
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// lfdux LdStLFDU
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// lfdx LdStLFD
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// lfs LdStLFD
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// lfsu LdStLFDU
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// lfsux LdStLFDU
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// lfsx LdStLFD
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// lha LdStLHA
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// lhau LdStLHAU
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// lhaux LdStLHAU
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// lhax LdStLHA
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// lhbrx LdStLoad
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// lhz LdStLoad
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// lhzu LdStLoadUpd
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// lhzux LdStLoadUpd
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// lhzx LdStLoad
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// lmw LdStLMW
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// lswi LdStLMW
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// lswx LdStLMW
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// lvebx LdStLVecX
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// lvehx LdStLVecX
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// lvewx LdStLVecX
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// lvsl LdStLVecX
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// lvsr LdStLVecX
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// lvx LdStLVecX
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// lvxl LdStLVecX
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// lwa LdStLWA
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// lwarx LdStLWARX
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// lwaux LdStLHAU
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// lwax LdStLHA
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// lwbrx LdStLoad
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// lwz LdStLoad
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// lwzu LdStLoadUpd
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// lwzux LdStLoadUpd
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// lwzx LdStLoad
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// mcrf BrMCR
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// mcrfs FPGeneral
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// mcrxr BrMCRX
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// mfcr SprMFCR
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// mffs IntMFFS
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// mfmsr SprMFMSR
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// mfspr SprMFSPR
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// mfsr SprMFSR
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// mfsrin SprMFSR
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// mftb SprMFTB
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// mfvscr IntMFVSCR
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// mtcrf BrMCRX
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// mtfsb0 IntMTFSB0
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// mtfsb1 IntMTFSB0
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// mtfsf IntMTFSB0
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// mtfsfi IntMTFSB0
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// mtmsr SprMTMSR
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// mtmsrd LdStLD
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// mtspr SprMTSPR
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// mtsr SprMTSR
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// mtsrd IntMTSRD
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// mtsrdin IntMTSRD
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// mtsrin SprMTSRIN
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// mtvscr IntMFVSCR
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// mulhd IntMulHD
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// mulhdu IntMulHD
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// mulhw IntMulHW
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// mulhwu IntMulHWU
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// mulld IntMulHD
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// mulli IntMulLI
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// mullw IntMulHW
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// nand IntSimple
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// neg IntSimple
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// nor IntSimple
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// or IntSimple
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// orc IntSimple
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// ori IntSimple
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// oris IntSimple
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// rfi SprRFI
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// rfid IntRFID
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// rldcl IntRotateD
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// rldcr IntRotateD
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// rldic IntRotateDI
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// rldicl IntRotateDI
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// rldicr IntRotateDI
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// rldimi IntRotateDI
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// rlwimi IntRotate
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// rlwinm IntGeneral
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// rlwnm IntGeneral
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// sc SprSC
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// slbia LdStSLBIA
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// slbie LdStSLBIE
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// sld IntRotateD
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// slw IntGeneral
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// srad IntRotateD
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// sradi IntRotateDI
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// sraw IntShift
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// srawi IntShift
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// srd IntRotateD
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// srw IntGeneral
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// stb LdStStore
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// stbu LdStStoreUpd
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// stbux LdStStoreUpd
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// stbx LdStStore
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// std LdStSTD
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// stdcx. LdStSTDCX
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// stdu LdStSTDU
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// stdux LdStSTDU
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// stdx LdStSTD
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// stfd LdStSTFD
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// stfdu LdStSTFDU
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// stfdux LdStSTFDU
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// stfdx LdStSTFD
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// stfiwx LdStSTFD
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// stfs LdStSTFD
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// stfsu LdStSTFDU
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// stfsux LdStSTFDU
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// stfsx LdStSTFD
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// sth LdStStore
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// sthbrx LdStStore
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// sthu LdStStoreUpd
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// sthux LdStStoreUpd
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// sthx LdStStore
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// stmw LdStLMW
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// stswi LdStLMW
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// stswx LdStLMW
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// stvebx LdStSTVEBX
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// stvehx LdStSTVEBX
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// stvewx LdStSTVEBX
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// stvx LdStSTVEBX
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// stvxl LdStSTVEBX
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// stw LdStStore
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// stwbrx LdStStore
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// stwcx. LdStSTWCX
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// stwu LdStStoreUpd
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// stwux LdStStoreUpd
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// stwx LdStStore
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// subf IntGeneral
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// subfc IntGeneral
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// subfe IntGeneral
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// subfic IntGeneral
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// subfme IntGeneral
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// subfze IntGeneral
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// sync LdStSync
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// td IntTrapD
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// tdi IntTrapD
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// tlbia LdStSLBIA
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// tlbie LdStDCBF
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// tlbsync SprTLBSYNC
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// tw IntTrapW
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// twi IntTrapW
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// vaddcuw VecGeneral
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// vaddfp VecFP
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// vaddsbs VecGeneral
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// vaddshs VecGeneral
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// vaddsws VecGeneral
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// vaddubm VecGeneral
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// vaddubs VecGeneral
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// vadduhm VecGeneral
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// vadduhs VecGeneral
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// vadduwm VecGeneral
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// vadduws VecGeneral
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// vand VecGeneral
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// vandc VecGeneral
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// vavgsb VecGeneral
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// vavgsh VecGeneral
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// vavgsw VecGeneral
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// vavgub VecGeneral
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// vavguh VecGeneral
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// vavguw VecGeneral
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// vcfsx VecFP
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// vcfux VecFP
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// vcmpbfp VecFPCompare
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// vcmpeqfp VecFPCompare
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// vcmpequb VecGeneral
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// vcmpequh VecGeneral
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// vcmpequw VecGeneral
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// vcmpgefp VecFPCompare
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// vcmpgtfp VecFPCompare
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// vcmpgtsb VecGeneral
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// vcmpgtsh VecGeneral
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// vcmpgtsw VecGeneral
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// vcmpgtub VecGeneral
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// vcmpgtuh VecGeneral
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// vcmpgtuw VecGeneral
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// vctsxs VecFP
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// vctuxs VecFP
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// vexptefp VecFP
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// vlogefp VecFP
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// vmaddfp VecFP
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// vmaxfp VecFPCompare
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// vmaxsb VecGeneral
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// vmaxsh VecGeneral
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// vmaxsw VecGeneral
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// vmaxub VecGeneral
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// vmaxuh VecGeneral
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// vmaxuw VecGeneral
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// vmhaddshs VecComplex
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// vmhraddshs VecComplex
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// vminfp VecFPCompare
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// vminsb VecGeneral
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// vminsh VecGeneral
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// vminsw VecGeneral
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// vminub VecGeneral
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// vminuh VecGeneral
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// vminuw VecGeneral
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// vmladduhm VecComplex
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// vmrghb VecPerm
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// vmrghh VecPerm
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// vmrghw VecPerm
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// vmrglb VecPerm
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// vmrglh VecPerm
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// vmrglw VecPerm
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// vmsubfp VecFP
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// vmsummbm VecComplex
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// vmsumshm VecComplex
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// vmsumshs VecComplex
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// vmsumubm VecComplex
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// vmsumuhm VecComplex
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// vmsumuhs VecComplex
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// vmulesb VecComplex
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// vmulesh VecComplex
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// vmuleub VecComplex
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// vmuleuh VecComplex
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// vmulosb VecComplex
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// vmulosh VecComplex
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// vmuloub VecComplex
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// vmulouh VecComplex
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// vnor VecGeneral
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// vor VecGeneral
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// vperm VecPerm
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// vpkpx VecPerm
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// vpkshss VecPerm
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// vpkshus VecPerm
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// vpkswss VecPerm
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// vpkswus VecPerm
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// vpkuhum VecPerm
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// vpkuhus VecPerm
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// vpkuwum VecPerm
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// vpkuwus VecPerm
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// vrefp VecFPRound
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// vrfim VecFPRound
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// vrfin VecFPRound
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// vrfip VecFPRound
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// vrfiz VecFPRound
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// vrlb VecGeneral
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// vrlh VecGeneral
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// vrlw VecGeneral
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// vrsqrtefp VecFP
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// vsel VecGeneral
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// vsl VecVSL
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// vslb VecGeneral
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// vsldoi VecPerm
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// vslh VecGeneral
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// vslo VecPerm
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// vslw VecGeneral
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// vspltb VecPerm
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// vsplth VecPerm
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// vspltisb VecPerm
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// vspltish VecPerm
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// vspltisw VecPerm
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// vspltw VecPerm
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// vsr VecVSR
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// vsrab VecGeneral
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// vsrah VecGeneral
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// vsraw VecGeneral
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// vsrb VecGeneral
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// vsrh VecGeneral
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// vsro VecPerm
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// vsrw VecGeneral
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// vsubcuw VecGeneral
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// vsubfp VecFP
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// vsubsbs VecGeneral
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// vsubshs VecGeneral
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// vsubsws VecGeneral
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// vsububm VecGeneral
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// vsububs VecGeneral
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// vsubuhm VecGeneral
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// vsubuhs VecGeneral
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// vsubuwm VecGeneral
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// vsubuws VecGeneral
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// vsum2sws VecComplex
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// vsum4sbs VecComplex
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// vsum4shs VecComplex
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// vsum4ubs VecComplex
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// vsumsws VecComplex
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// vupkhpx VecPerm
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// vupkhsb VecPerm
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// vupkhsh VecPerm
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// vupklpx VecPerm
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// vupklsb VecPerm
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// vupklsh VecPerm
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// vxor VecGeneral
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// xor IntSimple
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// xori IntSimple
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// xoris IntSimple
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//
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