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451bcf1b36
It is found on boards equipped with LS1028A SoC.
802.1q VLAN grouping is supported.
An external MDIO device is used for communicating with PHYs.
The driver is built as a module by default, it is not included
in GENERIC kernel config.
Submitted by: Lukasz Hajec <lha@semihalf.com>
Kornel Duleba <mindal@semihalf.com>
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D30923
105 lines
3.4 KiB
C
105 lines
3.4 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2021 Alstom Group.
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* Copyright (c) 2021 Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _FELIX_VAR_H_
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#define _FELIX_VAR_H_
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#define FELIX_INIT_TIMEOUT 5000 /* msec */
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#define FELIX_DEV_NAME "Felix TSN Switch driver"
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#define FELIX_MAX_PORTS 6
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#define FELIX_NUM_VLANS 4096
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#define PCI_VENDOR_FREESCALE 0x1957
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#define FELIX_DEV_ID 0xEEF0
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#define FELIX_BAR_REGS 4
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#define FELIX_LOCK(_sc) mtx_lock(&(_sc)->mtx)
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#define FELIX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
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#define FELIX_LOCK_ASSERT(_sc, _what) mtx_assert(&(_sc)->mtx, (_what))
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#define FELIX_RD4(sc, reg) bus_read_4((sc)->regs, reg)
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#define FELIX_WR4(sc, reg, value) bus_write_4((sc)->regs, reg, value)
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#define FELIX_DEVGMII_PORT_RD4(sc, port, reg) \
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FELIX_RD4(sc, \
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FELIX_DEVGMII_BASE + (FELIX_DEVGMII_PORT_OFFSET * (port)) + reg)
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#define FELIX_DEVGMII_PORT_WR4(sc, port, reg, value) \
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FELIX_WR4(sc, \
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FELIX_DEVGMII_BASE + (FELIX_DEVGMII_PORT_OFFSET * (port)) + reg, \
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value)
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#define FELIX_ANA_PORT_RD4(sc, port, reg) \
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FELIX_RD4(sc, \
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FELIX_ANA_PORT_BASE + (FELIX_ANA_PORT_OFFSET * (port)) + reg)
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#define FELIX_ANA_PORT_WR4(sc, port, reg, value) \
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FELIX_WR4(sc, \
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FELIX_ANA_PORT_BASE + (FELIX_ANA_PORT_OFFSET * (port)) + reg, \
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value)
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#define FELIX_REW_PORT_RD4(sc, port, reg) \
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FELIX_RD4(sc, \
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FELIX_REW_PORT_BASE + (FELIX_REW_PORT_OFFSET * (port)) + reg)
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#define FELIX_REW_PORT_WR4(sc, port, reg, value) \
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FELIX_WR4(sc, \
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FELIX_REW_PORT_BASE + (FELIX_REW_PORT_OFFSET * (port)) + reg, \
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value)
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struct felix_pci_id {
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uint16_t vendor;
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uint16_t device;
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const char *desc;
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};
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struct felix_port {
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struct ifnet *ifp;
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device_t miibus;
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char *ifname;
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uint32_t phyaddr;
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int fixed_link_status;
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bool fixed_port;
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bool cpu_port;
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};
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typedef struct felix_softc {
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device_t dev;
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struct resource *regs;
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etherswitch_info_t info;
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struct callout tick_callout;
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struct mtx mtx;
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struct felix_port ports[FELIX_MAX_PORTS];
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int vlan_mode;
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int vlans[FELIX_NUM_VLANS];
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} *felix_softc_t;
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#endif
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