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d320e05ca5
- Rename pciereg_cfgopen() to pcie_cfgregopen() and expose it to the rest of the kernel. It now also accepts parameters via function arguments rather than global variables. - Add a notion of minimum and maximum bus numbers and reject requests for an out of range bus. - Add more range checks on slot/func/reg/bytes parameters to the cfg reg read/write routines. Don't panic on any invalid parameters, just fail the request (writes do nothing, reads return -1). This matches the behavior of the other cfg mechanisms. - Port the memory mapped configuration space access to amd64. On amd64 we simply use the direct map (via pmap_mapdev()) for the memory mapped window. - During acpi_attach() just after loading the ACPI tables, check for a MCFG table. If it exists, call pciereg_cfgopen() on each subtable (memory mapped window). For now we only support windows for domain 0 that start with bus 0. This removes the need for more chipset-specific quirks in the MD code. - Remove the chipset-specific quirks for the Intel 5000P/V/Z chipsets since these machines should all have MCFG tables via ACPI. - Updated pci_cfgregopen() to DTRT if ACPI had invoked pcie_cfgregopen() earlier. MFC after: 2 weeks |
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| .. | ||
| Osd | ||
| acpi.c | ||
| acpi_acad.c | ||
| acpi_battery.c | ||
| acpi_button.c | ||
| acpi_cmbat.c | ||
| acpi_cpu.c | ||
| acpi_dock.c | ||
| acpi_ec.c | ||
| acpi_hpet.c | ||
| acpi_hpet.h | ||
| acpi_if.m | ||
| acpi_isab.c | ||
| acpi_lid.c | ||
| acpi_package.c | ||
| acpi_pci.c | ||
| acpi_pci_link.c | ||
| acpi_pcib.c | ||
| acpi_pcib_acpi.c | ||
| acpi_pcib_pci.c | ||
| acpi_pcibvar.h | ||
| acpi_perf.c | ||
| acpi_powerres.c | ||
| acpi_quirk.c | ||
| acpi_quirks | ||
| acpi_resource.c | ||
| acpi_smbat.c | ||
| acpi_smbus.h | ||
| acpi_thermal.c | ||
| acpi_throttle.c | ||
| acpi_timer.c | ||
| acpi_video.c | ||
| acpiio.h | ||
| acpivar.h | ||