Landon J. Fuller 824b48eff3 bhnd(4): Implement backplane interrupt handling. ... This adds bhnd(4) bus-level support for querying backplane interrupt vector routing, and delegating machine/bridge-specific interrupt handling to the concrete bhnd(4) driver implementation. On bhndb(4) bridged PCI devices, we provide the PCI/MSI interrupt directly to attached cores. On MIPS devices, we report a backplane interrupt count of 0, effectively disabling the bus-level interrupt assignment. This allows mips/broadcom to temporarily continue using hard-coded MIPS IRQs until bhnd_mips PIC support is implemented. Reviewed by: mizhka Approved by: adrian (mentor, implicit)		2016-09-05 22:11:46 +00:00
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bcma.c	bhnd(4): Implement backplane interrupt handling.	2016-09-05 22:11:46 +00:00
bcma.h	Implement a generic bhnd(4) device enumeration table API.	2016-09-03 23:57:17 +00:00
bcma_bhndb.c	Migrate bhndb(4) to the new bhnd_erom API.	2016-09-04 00:58:19 +00:00
bcma_dmp.h	bhnd(4): Implement backplane interrupt handling.	2016-09-05 22:11:46 +00:00
bcma_erom.c	Migrate bhndb(4) to the new bhnd_erom API.	2016-09-04 00:58:19 +00:00
bcma_eromreg.h
bcma_eromvar.h	Migrate bhndb(4) to the new bhnd_erom API.	2016-09-04 00:58:19 +00:00
bcma_nexus.c	Migrate bhndb(4) to the new bhnd_erom API.	2016-09-04 00:58:19 +00:00
bcma_subr.c	Migrate bhndb(4) to the new bhnd_erom API.	2016-09-04 00:58:19 +00:00
bcmavar.h	bhnd(4): Implement backplane interrupt handling.	2016-09-05 22:11:46 +00:00