Konstantin Belousov ce21d4bff1 amd64 efirt: do not flush cache for runtime pages ... We actually do not know is it safe or not to flush cache for random BAR/register page existing in the system. It is well-known that for instance LAPICs cannot tolerate cache flush. As report indicates, there are more such devices. This issue typically affects AMD machines which do not report self-snoop, causing real CLFLUSH invocation on the mapped pages. Intels do self-snoop, so this change should be nop for them, and unsafe devices, if any, are already ignored. Reported and tested by: manu Reviewed by: alc, markj Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D32318		2021-10-06 05:53:20 +03:00
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acpica	amd64 wakeup: rework trampoline page allocation	2021-09-14 00:23:15 +03:00
amd64	amd64 efirt: do not flush cache for runtime pages	2021-10-06 05:53:20 +03:00
conf	Drop cloudabi	2021-09-22 00:18:44 +03:00
ia32	amd64 sendsig: fix context corruption	2021-09-27 20:12:46 +03:00
include	amd64: add pmap_page_set_memattr_noflush()	2021-10-06 05:53:12 +03:00
linux	amd64: consistently use uprintf() to report weird situations in sigreturn	2021-09-21 20:20:15 +03:00
linux32	amd64: centralize definitions of CS_SECURE and EFL_SECURE	2021-09-21 20:20:14 +03:00
pci	pci_cfgreg.c: Use io port config access for early boot time.	2019-04-09 18:07:17 +00:00
sgx	Convert remaining cap_rights_init users to cap_rights_init_one	2021-01-12 13:16:10 +00:00
vmm	Revert "cpuset(9): Add CPU_FOREACH_IS(SET|CLR) and modify consumers to use it"	2021-09-21 13:51:42 -04:00
Makefile	Bring the tags and links entries for amd64 up to date.	2021-09-27 20:04:51 -07:00