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Revert r338177, r338176, r338175, r338174, r338172 After long consultations with re@, core members and mmacy, revert these changes. Followup changes will be made to mark them as deprecated and prent a message about where to find the up-to-date driver. Followup commits will be made to make this clear in the installer. Followup commits to reduce POLA in ways we're still exploring. It's anticipated that after the freeze, this will be removed in 13-current (with the residual of the drm2 code copied to sys/arm/dev/drm2 for the TEGRA port's use w/o the intel or radeon drivers). Due to the impending freeze, there was no formal core vote for this. I've been talking to different core members all day, as well as Matt Macey and Glen Barber. Nobody is completely happy, all are grudgingly going along with this. Work is in progress to mitigate the negative effects as much as possible. Requested by: re@ (gjb, rgrimes)
30 lines
648 B
Text
30 lines
648 B
Text
rn50 0x3294
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0x1434 SRC_Y_X
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0x1438 DST_Y_X
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0x143C DST_HEIGHT_WIDTH
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0x146C DP_GUI_MASTER_CNTL
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0x1474 BRUSH_Y_X
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0x1478 DP_BRUSH_BKGD_CLR
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0x147C DP_BRUSH_FRGD_CLR
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0x1480 BRUSH_DATA0
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0x1484 BRUSH_DATA1
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0x1598 DST_WIDTH_HEIGHT
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0x15C0 CLR_CMP_CNTL
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0x15C4 CLR_CMP_CLR_SRC
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0x15C8 CLR_CMP_CLR_DST
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0x15CC CLR_CMP_MSK
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0x15D8 DP_SRC_FRGD_CLR
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0x15DC DP_SRC_BKGD_CLR
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0x1600 DST_LINE_START
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0x1604 DST_LINE_END
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0x1608 DST_LINE_PATCOUNT
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0x16C0 DP_CNTL
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0x16CC DP_WRITE_MSK
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0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
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0x16E8 DEFAULT_SC_BOTTOM_RIGHT
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0x16EC SC_TOP_LEFT
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0x16F0 SC_BOTTOM_RIGHT
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0x16F4 SRC_SC_BOTTOM_RIGHT
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0x1714 DSTCACHE_CTLSTAT
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0x1720 WAIT_UNTIL
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0x172C RBBM_GUICNTL
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