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37eed8419c
Intel CPUs. The feature tags TLB entries with the Id of the address space and allows to avoid TLB invalidation on the context switch, it is available only in the long mode. In the microbenchmarks, using the PCID decreased latency of the context switches by ~30% on SandyBridge class desktop CPUs, measured with the lat_ctx program from lmbench. If available, use INVPCID instruction when a TLB entry in non-current address space needs to be invalidated. The instruction is typically available on the Haswell. If needed, the use of PCID can be turned off with the vm.pmap.pcid_enabled loader tunable set to 0. The state of the feature is reported by the vm.pmap.pcid_enabled sysctl. The sysctl vm.pmap.pcid_save_cnt reports the number of context switches which avoided invalidating the TLB; compare with the total number of context switches, available as sysctl vm.stats.sys.v_swtch. Sponsored by: The FreeBSD Foundation Reviewed by: alc Tested by: pho, bf
85 lines
2.6 KiB
C
85 lines
2.6 KiB
C
/*-
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* ----------------------------------------------------------------------------
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* "THE BEER-WARE LICENSE" (Revision 42):
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* <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
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* can do whatever you want with this stuff. If we meet some day, and you think
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* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
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* ----------------------------------------------------------------------------
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*
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* $FreeBSD$
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*
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*/
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#ifndef _MACHINE_SMP_H_
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#define _MACHINE_SMP_H_
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#ifdef _KERNEL
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#ifdef SMP
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#ifndef LOCORE
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#include <sys/bus.h>
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#include <machine/frame.h>
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#include <machine/intr_machdep.h>
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#include <machine/apicvar.h>
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#include <machine/pcb.h>
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/* global symbols in mpboot.S */
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extern char mptramp_start[];
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extern char mptramp_end[];
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extern u_int32_t mptramp_pagetables;
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/* global data in mp_machdep.c */
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extern int mp_naps;
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extern int boot_cpu_id;
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extern struct pcb stoppcbs[];
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extern int cpu_apic_ids[];
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#ifdef COUNT_IPIS
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extern u_long *ipi_invltlb_counts[MAXCPU];
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extern u_long *ipi_invlrng_counts[MAXCPU];
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extern u_long *ipi_invlpg_counts[MAXCPU];
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extern u_long *ipi_invlcache_counts[MAXCPU];
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extern u_long *ipi_rendezvous_counts[MAXCPU];
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#endif
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/* IPI handlers */
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inthand_t
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IDTVEC(invltlb), /* TLB shootdowns - global */
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IDTVEC(invlpg), /* TLB shootdowns - 1 page */
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IDTVEC(invlrng), /* TLB shootdowns - page range */
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IDTVEC(invlcache), /* Write back and invalidate cache */
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IDTVEC(ipi_intr_bitmap_handler), /* Bitmap based IPIs */
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IDTVEC(cpustop), /* CPU stops & waits to be restarted */
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IDTVEC(cpususpend), /* CPU suspends & waits to be resumed */
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IDTVEC(rendezvous); /* handle CPU rendezvous */
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struct pmap;
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/* functions in mp_machdep.c */
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void cpu_add(u_int apic_id, char boot_cpu);
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void cpustop_handler(void);
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void cpususpend_handler(void);
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void init_secondary(void);
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void ipi_startup(int apic_id, int vector);
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void ipi_all_but_self(u_int ipi);
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void ipi_bitmap_handler(struct trapframe frame);
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void ipi_cpu(int cpu, u_int ipi);
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int ipi_nmi_handler(void);
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void ipi_selected(cpuset_t cpus, u_int ipi);
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u_int mp_bootaddress(u_int);
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void smp_cache_flush(void);
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void smp_invlpg(struct pmap *pmap, vm_offset_t addr);
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void smp_masked_invlpg(cpuset_t mask, struct pmap *pmap, vm_offset_t addr);
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void smp_invlpg_range(struct pmap *pmap, vm_offset_t startva,
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vm_offset_t endva);
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void smp_masked_invlpg_range(cpuset_t mask, struct pmap *pmap,
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vm_offset_t startva, vm_offset_t endva);
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void smp_invltlb(struct pmap *pmap);
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void smp_masked_invltlb(cpuset_t mask, struct pmap *pmap);
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#endif /* !LOCORE */
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#endif /* SMP */
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#endif /* _KERNEL */
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#endif /* _MACHINE_SMP_H_ */
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