Colin Percival 6a75d3b3fb x86: Adjust base addr for PCI MCFG regions ... Each bus gets 1 MB of address space; the actual base address for an MCFG bus range is the address from the table plus the starting bus number times 1 MB. The PCI spec is unclear on this point, but this change matches what Linux does, which is likely enough of a de facto standard regardless of what any de jure standard might attempt to say. Fixes: f54a3890b1f4 ("x86: Support multiple PCI MCFG regions") Reviewed by: jhb Differential Revision: https://reviews.freebsd.org/D43206 (cherry picked from commit 61e2161367bb4e68e603f53b1107f9427f988861)		2024-01-18 15:24:35 -08:00
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acpica	x86: AMD Zen2: Zenbleed chicken bit mitigation	2023-10-10 09:34:31 -04:00
amd64	thread: Add a return value to cpu_set_upcall()	2024-01-01 19:29:48 -05:00
conf	release: update stable/14 following branching from main	2023-08-24 19:07:33 -04:00
ia32	syscalls: fix missing SIGSYS for several ENOSYS errors	2023-10-09 06:24:31 +03:00
include	vmm: implement single-stepping for AMD CPUs	2024-01-04 16:25:41 -08:00
linux	makesyscalls: don't make syscall.mk by default	2023-12-13 23:07:06 +00:00
linux32	makesyscalls: don't make syscall.mk by default	2023-12-13 23:07:06 +00:00
pci	x86: Adjust base addr for PCI MCFG regions	2024-01-18 15:24:35 -08:00
sgx	sys: Remove $FreeBSD$: one-line .c pattern	2023-08-16 11:54:36 -06:00
vmm	pci_cfgreg: Add a PCI domain argument to the low-level register API	2024-01-18 14:44:51 -08:00
Makefile	sys: Remove $FreeBSD$: one-line sh pattern	2023-08-16 11:54:58 -06:00