Adrian Chadd 240de6998b arge: don't do the rx fixup copy and just offset the mbuf by 2 bytes ... The existing code meets the "alignment" requirement for the l3 payload by offsetting the mbuf by uint64_t and then calling an rx fixup routine to copy the frame backwards by 2 bytes. This DWORD aligns the L3 payload so tcp, etc doesn't panic on unaligned access. This is .. slow. For arge MACs that support 1 byte TX/RX address alignment, we can do the "other" hack: offset the RX address of the mbuf so the L3 payload again is hopefully DWORD aligned. This is much cheaper - since TX/RX is both 1 byte align ready (thanks to the previous commit) there's no bounce buffering going on and there is no rx fixup copying. This gets bridging performance up from 180mbit/sec -> 410mbit/sec. There's around 10% of CPU cycles spent in _bus_dmamap_sync(); I'll investigate that later. Tested: * QCA955x SoC (AP135 reference board), bridging arge0/arge1 by programming the switch to have two vlangroups in dot1q mode: # ifconfig bridge0 inet 192.168.2.20/24 # etherswitchcfg config vlan_mode dot1q # etherswitchcfg vlangroup0 members 0,1,2,3,4 # etherswitchcfg vlangroup1 vlan 2 members 5,6 # etherswitchcfg port5 pvid 2 # etherswitchcfg port6 pvid 2 # ifconfig arge1 up # ifconfig bridge0 addm arge1		2015-10-21 01:41:18 +00:00
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adm5120	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
alchemy	Fix a typo introduced in r257338.	2013-10-31 02:27:16 +00:00
atheros	arge: don't do the rx fixup copy and just offset the mbuf by 2 bytes	2015-10-21 01:41:18 +00:00
beri	preload_search_info: make sure mod is set	2015-08-21 15:57:57 +00:00
cavium	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
conf	Disable SWAPPING as we don't do it on this board.	2015-10-20 19:32:26 +00:00
gxemul	Add 32-bit support for Gxemul's oldtestmips machine emulation	2013-09-04 20:34:36 +00:00
idt	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
include	Rationalize BSD license on sys/*/include/in_cksum.h	2015-08-05 19:05:12 +00:00
malta	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
mips	Exploit r288122 to address a cosmetic issue. Since PV chunk pages don't	2015-09-26 07:18:05 +00:00
nlm	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
rmi	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
rt305x	Add support for the uart classes to set their default register shift value.	2015-04-11 17:16:23 +00:00
sentry5	Merge from vmobj-rwlock branch:	2013-02-26 01:00:11 +00:00
sibyte	Devices that rely on hints or identify routines for discovery need to	2013-10-29 14:07:31 +00:00