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https://github.com/opnsense/src.git
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35f6b83049
Sponsored by: Arm Ltd (cherry picked from commit 5a02ffc32e777041dd2dad4e651ed2a0865a0a5d)
59 lines
1.6 KiB
C
59 lines
1.6 KiB
C
/*
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* Public API.
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*
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* Copyright (c) 2015-2023, Arm Limited.
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* SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
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*/
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#ifndef _MATHLIB_H
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#define _MATHLIB_H
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float expf (float);
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float exp2f (float);
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float logf (float);
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float log2f (float);
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float powf (float, float);
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float sinf (float);
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float cosf (float);
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void sincosf (float, float*, float*);
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double exp (double);
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double exp10 (double);
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double exp2 (double);
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double log (double);
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double log2 (double);
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double pow (double, double);
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#if __aarch64__
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# if __GNUC__ >= 5
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typedef __Float32x4_t __f32x4_t;
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typedef __Float64x2_t __f64x2_t;
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# elif __clang_major__*100+__clang_minor__ >= 305
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typedef __attribute__((__neon_vector_type__(4))) float __f32x4_t;
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typedef __attribute__((__neon_vector_type__(2))) double __f64x2_t;
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# else
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# error Unsupported compiler
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# endif
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# if __GNUC__ >= 9 || __clang_major__ >= 8
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# undef __vpcs
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# define __vpcs __attribute__((__aarch64_vector_pcs__))
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/* Vector functions following the vector PCS using ABI names. */
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__vpcs __f32x4_t _ZGVnN4v_sinf (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_cosf (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_expf_1u (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_expf (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_exp2f_1u (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_exp2f (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4v_logf (__f32x4_t);
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__vpcs __f32x4_t _ZGVnN4vv_powf (__f32x4_t, __f32x4_t);
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__vpcs __f64x2_t _ZGVnN2v_sin (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_cos (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_exp (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2v_log (__f64x2_t);
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__vpcs __f64x2_t _ZGVnN2vv_pow (__f64x2_t, __f64x2_t);
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# endif
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#endif
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#endif
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