Andriy Gapon d16d35fd54 pci(4): don't perform maximum register number check ... Different sub-kinds of PCI buses may have different rules and thus it is up for the bus backends to do proper input checks. For example, PCIe allows configuration register numbers < 0x1000, while for PCI proper the limit is 0x100. And, in fact, the buses already do the checks. Reviewed by: jhb MFC after: 1 week X-ToDo: add check for negative value to bus backends X-ToDo: use named constant for maximum PCIe register		2009-09-11 18:48:49 +00:00
..
eisa_pci.c
fixup_pci.c	Workaround a hang on some nForce2 systems that can happen if the CPU goes	2006-05-24 14:08:31 +00:00
hostb_pci.c	Move the hostb driver out of the i386 and amd64 PCI code (where it was	2005-12-20 21:09:45 +00:00
ignore_pci.c
isa_pci.c	Don't save and restore the ELCR register across suspend and resume for	2005-09-29 15:00:09 +00:00
pci.c	Add a MD __PCI_BAR_ZERO_VALID which denotes that BARs containing 0	2009-07-21 19:06:39 +00:00
pci_if.m	Revamp the MSI/MSI-X code a bit to achieve two main goals:	2007-05-02 17:50:36 +00:00
pci_pci.c	Revert junk from last commit. These are WIP and not ready (and don't	2009-05-20 22:00:39 +00:00
pci_private.h	Further refine the handling of resources for BARs in the PCI bus driver.	2009-03-03 16:38:59 +00:00
pci_user.c	pci(4): don't perform maximum register number check	2009-09-11 18:48:49 +00:00
pcib_if.m	Revert junk from last commit. These are WIP and not ready (and don't	2009-05-20 22:00:39 +00:00
pcib_private.h	Two fixes:	2009-03-14 14:08:53 +00:00
pcireg.h	pci: remove definitions of duplicate constants	2009-09-10 19:27:53 +00:00
pcivar.h	pci: remove definitions of duplicate constants	2009-09-10 19:27:53 +00:00
vga_pci.c	The recent PCI resource allocation fixes exposed a bug where the same	2009-03-04 21:04:52 +00:00