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- Some of the register writes were already done in the generic tuning code. Remove them. - Increase the polling timeout. The previous value is probably fine, but since timeouts are treated as fatal errors increasing it to 200ms won't hurt. - Rework the HS400 switching code. Make sure that the switch happens at the right time. Reset the DLL0 block. We need to do that if u-boot has previously configured the controller in HS400 mode. - Check current timing before tuning. The tuning devmethod is always called, even for timings that don't require the tuning procedure. - Rework software tuning routine code. Use inner formula for clock divider calculation, as previous one was incorrect. - Implement custom re-tune procedure. Co-authored-by: Hubert Mazur <hum@semihalf.com> Obtained from: Semihalf Sponsored by: Alstom Group Differential Revision: https://reviews.freebsd.org/D34027 |
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| .. | ||
| fsl_sdhci.c | ||
| sdhci.c | ||
| sdhci.h | ||
| sdhci_acpi.c | ||
| sdhci_fdt.c | ||
| sdhci_fdt_gpio.c | ||
| sdhci_fdt_gpio.h | ||
| sdhci_fsl_fdt.c | ||
| sdhci_if.m | ||
| sdhci_pci.c | ||
| sdhci_xenon.c | ||
| sdhci_xenon.h | ||
| sdhci_xenon_acpi.c | ||
| sdhci_xenon_fdt.c | ||