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and host1x module. Unfortunately, tegra124 SoC doesn't have 2D acceleration engine and 3D requires not yet started nouveau driver. These drivers forms a first non-x86 DRM2 enabled graphic stack. Note, there are 2 outstanding issues: - The code uses gross hack in order to be comply with OBJT_MGTDEVICE pager. (See tegra_bo_init_pager() in tegra_bo.c) - Due to improper(probably) refcounting in drm_gem_mmap_single() (in drm_gem.c), the gem objects are never released. I hope that I will be able to address both issues in finite time, but I don't want to touch x86 world now. MFC after: 1 month |
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| .. | ||
| files.tegra124 | ||
| std.tegra124 | ||
| tegra124_car.c | ||
| tegra124_car.h | ||
| tegra124_clk_per.c | ||
| tegra124_clk_pll.c | ||
| tegra124_clk_super.c | ||
| tegra124_coretemp.c | ||
| tegra124_cpufreq.c | ||
| tegra124_machdep.c | ||
| tegra124_mp.c | ||
| tegra124_mp.h | ||
| tegra124_pmc.c | ||
| tegra124_xusbpadctl.c | ||