mirror of
https://github.com/opnsense/src.git
synced 2026-04-23 23:28:37 -04:00
28ff96115d
The documented encoding space for Armv8 was only 8 bits, but v8.0 has always had a 10-bit encoding space for its events, and downstream in CheriBSD we relied on this full space. This worked until the DMC-620 and CMN-600 events were added, trampling on what should have been reserved for Armv8.0 right from the start. Thus, renumber the DMC-620 and CMN-600 events to not do this before they make it into a stable release, allowing for the full Armv8.0 encoding space to be used without having to split it across two different regions. Note that Armv8.1 grows the encoding space to 16 bits, which doesn't fit well with our current approach. No attempt is made to allow for these events in this change, only the ones that have always been valid (according to the hardware) from the first commit of Armv8 support to hwpmc. Reviewed by: arichardson, tsoome Differential Revision: https://reviews.freebsd.org/D36925 |
||
|---|---|---|
| .. | ||
| hwpmc_amd.c | ||
| hwpmc_amd.h | ||
| hwpmc_arm.c | ||
| hwpmc_arm64.c | ||
| hwpmc_arm64.h | ||
| hwpmc_arm64_md.c | ||
| hwpmc_armv7.c | ||
| hwpmc_armv7.h | ||
| hwpmc_cmn600.c | ||
| hwpmc_cmn600.h | ||
| hwpmc_core.c | ||
| hwpmc_core.h | ||
| hwpmc_dmc620.c | ||
| hwpmc_dmc620.h | ||
| hwpmc_e500.c | ||
| hwpmc_intel.c | ||
| hwpmc_logging.c | ||
| hwpmc_mod.c | ||
| hwpmc_mpc7xxx.c | ||
| hwpmc_power8.c | ||
| hwpmc_powerpc.c | ||
| hwpmc_powerpc.h | ||
| hwpmc_ppc970.c | ||
| hwpmc_riscv.h | ||
| hwpmc_soft.c | ||
| hwpmc_soft.h | ||
| hwpmc_tsc.c | ||
| hwpmc_tsc.h | ||
| hwpmc_uncore.c | ||
| hwpmc_uncore.h | ||
| hwpmc_x86.c | ||
| pmc_events.h | ||
| pmu_dmc620.c | ||
| pmu_dmc620_reg.h | ||