Ed Maste 7a47d65d5d Use zero register instead of immediate 0x0 in MIPS assembly ... It seems GAS makes the substitution automatically, but Clang's integrated assembler does not (yet). It fails with "invalid operand for instruction." Reported by: sbruno		2015-01-29 15:30:04 +00:00
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hardfloat	Merge r195025 from projects/mips to head by hand:	2010-01-08 23:50:39 +00:00
_ctx_start.S	Merge jmallett@'s n64 work into HEAD - changeset 2	2010-06-16 14:13:36 +00:00
_set_tp.c	Implement _set_tp	2012-03-06 03:30:09 +00:00
_setjmp.S	Add FPU support for MIPS setjmp(3)/longjmp(3).	2014-11-21 20:02:06 +00:00
fabs.c	Add mips support libc from the mips2-jnpr branch of perforce.	2008-04-26 12:08:02 +00:00
fabs.S	Add mips support libc from the mips2-jnpr branch of perforce.	2008-04-26 12:08:02 +00:00
flt_rounds.c	Add mips support libc from the mips2-jnpr branch of perforce.	2008-04-26 12:08:02 +00:00
infinity.c	Add mips support libc from the mips2-jnpr branch of perforce.	2008-04-26 12:08:02 +00:00
ldexp.S	Add mips support libc from the mips2-jnpr branch of perforce.	2008-04-26 12:08:02 +00:00
longjmp.c	Remove clause 3 and 4 from TNF licenses	2013-05-29 01:54:10 +00:00
makecontext.c	Merge jmallett@'s n64 work into HEAD - changeset 2	2010-06-16 14:13:36 +00:00
Makefile.inc	Remove duplicate copies of trivial getcontextx.c	2015-01-12 18:13:38 +00:00
setjmp.S	Add FPU support for MIPS setjmp(3)/longjmp(3).	2014-11-21 20:02:06 +00:00
signalcontext.c	Add mips support libc from the mips2-jnpr branch of perforce.	2008-04-26 12:08:02 +00:00
sigsetjmp.S	Use zero register instead of immediate 0x0 in MIPS assembly	2015-01-29 15:30:04 +00:00