mirror of
https://github.com/opnsense/src.git
synced 2026-03-18 16:52:21 -04:00
BERI stands for Bluespec Extensible RISC Implementation, based on MIPS. BERI has not implemented standard MIPS perfomance monitoring counters, instead it provides statistical counters. BERI statcounters have a several limitations: - They can't be written - They don't support start/stop operation - None of hardware interrupt is provided on a counter overflow. So make it separate to hwpmc_mips module and support process/system counting mode only. Sponsored by: DARPA, AFRL |
||
|---|---|---|
| .. | ||
| hwpmc_amd.c | ||
| hwpmc_amd.h | ||
| hwpmc_arm.c | ||
| hwpmc_arm64.c | ||
| hwpmc_arm64.h | ||
| hwpmc_arm64_md.c | ||
| hwpmc_armv7.c | ||
| hwpmc_armv7.h | ||
| hwpmc_beri.c | ||
| hwpmc_beri.h | ||
| hwpmc_core.c | ||
| hwpmc_core.h | ||
| hwpmc_e500.c | ||
| hwpmc_intel.c | ||
| hwpmc_logging.c | ||
| hwpmc_mips.c | ||
| hwpmc_mips24k.c | ||
| hwpmc_mips74k.c | ||
| hwpmc_mod.c | ||
| hwpmc_mpc7xxx.c | ||
| hwpmc_octeon.c | ||
| hwpmc_powerpc.c | ||
| hwpmc_powerpc.h | ||
| hwpmc_ppc970.c | ||
| hwpmc_riscv.h | ||
| hwpmc_soft.c | ||
| hwpmc_soft.h | ||
| hwpmc_sparc64.c | ||
| hwpmc_tsc.c | ||
| hwpmc_tsc.h | ||
| hwpmc_uncore.c | ||
| hwpmc_uncore.h | ||
| hwpmc_x86.c | ||
| hwpmc_xscale.h | ||
| pmc_events.h | ||