Commit graph

13 commits

Author SHA1 Message Date
Pawel Biernacki
7029da5c36 Mark more nodes as CTLFLAG_MPSAFE or CTLFLAG_NEEDGIANT (17 of many)
r357614 added CTLFLAG_NEEDGIANT to make it easier to find nodes that are
still not MPSAFE (or already are but aren’t properly marked).
Use it in preparation for a general review of all nodes.

This is non-functional change that adds annotations to SYSCTL_NODE and
SYSCTL_PROC nodes using one of the soon-to-be-required flags.

Mark all obvious cases as MPSAFE.  All entries that haven't been marked
as MPSAFE before are by default marked as NEEDGIANT

Approved by:	kib (mentor, blanket)
Commented by:	kib, gallatin, melifaro
Differential Revision:	https://reviews.freebsd.org/D23718
2020-02-26 14:26:36 +00:00
Conrad Meyer
e656fa70dc hwpstate_intel(4): Save admin-set EPP/EPB and restore after suspend 2020-02-01 20:12:02 +00:00
Conrad Meyer
c93eb470b4 hwpstate_intel(4): Print failure message only on failure
X-MFC-With: r357379
2020-02-01 20:11:25 +00:00
Conrad Meyer
cd4e43b27d hwpstate_intel(4): Detect and support PKG variant
If package-level control is present, we default to using it.  Per-core
software control may be enabled by setting the machdep.hwpstate_pkg_ctrl
tunable to "0" in loader.conf(5).
2020-02-01 19:50:10 +00:00
Conrad Meyer
556a1a0bc6 hwpstate_intel(4): Add fallback EPP using PERF_BIAS MSR
Per Intel SDM (Vol 3b Part 2), if HWP indicates EPP (energy-performance
preference) is not supported, the hardware instead uses the ENERGY_PERF_BIAS
MSR.  In the epp sysctl handler, fall back to that MSR if HWP does not
support EPP and CPUID indicates the ENERGY_PERF_BIAS MSR is supported.
2020-02-01 19:49:13 +00:00
Conrad Meyer
5e3574c8cd x86: Add/amend some power-management comments/macros
No functional change.
2020-02-01 19:46:02 +00:00
Conrad Meyer
b80d476c3c hwpstate_intel(4): Error check epp sysctl & bail if HW does not support feature 2020-02-01 19:45:27 +00:00
Conrad Meyer
f591c3c847 intel_hwpstate(4): Use identcpu-cached cpuid 6 leaf
No functional change.
2020-02-01 17:54:46 +00:00
Conrad Meyer
351896d372 intel_hwpstate(4): Don't leak bound thread in error conditions
I don't know why a Skylake CPU with the HWP feature bit present would trap
on MSR reads of the HWP registers, but if this occurs, do not leave the
attach thread bound.  This could conceivably cause reported hangs, although
I have no evidence that this is the cause.

Reported by:	ae@, Andreas Nilsson <andrnils AT gmail.com>
X-MFC-With:	r357002
2020-02-01 17:30:45 +00:00
Conrad Meyer
07a65f9d38 hwpstate_intel(4): Silence/fix Coverity reports
These were all introduced in the initial import of hwpstate_intel(4).

Reported by:	Coverity
CIDs:		1413161, 1413164, 1413165, 1413167
X-MFC-With:	r357002
2020-01-29 03:15:34 +00:00
Conrad Meyer
08a220dd79 cpufreq(4): Fix missing MODULE_DEPEND on hwpstate_intel
DRIVER_MODULE does not actually define a MODULE_VERSION, which is required
to satisfy a MODULE_DEPENDency.  Declare one explicitly in
hwpstate_intel(4).

Reported by:	flo
X-MFC-With:	r357002
2020-01-23 23:52:57 +00:00
Cy Schubert
ca9fb12a0b Fix 32-bit build post r357002. 2020-01-23 03:38:41 +00:00
Conrad Meyer
4577cf3744 cpufreq(4): Add support for Intel Speed Shift
Intel Speed Shift is Intel's technology to control frequency in hardware,
with hints from software.

Let's get a working version of this in the tree and we can refine it from
here.

Submitted by:	bwidawsk, scottph
Reviewed by:	bcr (manpages), myself
Discussed with:	jhb, kib (earlier versions)
With feedback from:	Greg V, gallatin, freebsdnewbie AT freenet.de
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D18028
2020-01-22 23:28:42 +00:00