diff --git a/sys/arm64/arm64/pmap.c b/sys/arm64/arm64/pmap.c
index b3ae5e67092..a0e72020941 100644
--- a/sys/arm64/arm64/pmap.c
+++ b/sys/arm64/arm64/pmap.c
@@ -3713,14 +3713,7 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
 		cpu_icache_sync_range(PHYS_TO_DMAP(pa), PAGE_SIZE);
 
 	pmap_load_store(l3, l3_val);
-
-	/*
-	 * XXX In principle, because this L3 entry was invalid, we should not
-	 * need to perform a TLB invalidation here.  However, in practice,
-	 * when simply performing a "dsb ishst" here, processes are being
-	 * terminated due to bus errors and segmentation violations. 
-	 */
-	pmap_invalidate_page(pmap, va);
+	dsb(ishst);
 
 	return (mpte);
 }