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synced 2026-06-09 16:50:25 -04:00
ice: Update to 1.43.2-k
- Add extra time while waiting for an EMPR to finish on E830 and E825C devices - Fix debug mask sysctl help message - Handle EAGAIN error messages from the Get Link Status AQ command by retrying them several times - Handle the condition where E830 extended temperature SKUs can have the chip initialize without the PHY subsystem being ready due to very low temperatures; the driver will print out a message when this happens - Fix inability to set link speed using the advertise_speed sysctl when link is down and the link_active_on_if_down sysctl is set to 0 - Fix issue where VLANs would not properly be set back up after a hardware reset (e.g. PF reset) (Thanks jacob.e.keller@intel.com) Signed-off-by: Eric Joyner <erj@FreeBSD.org> Tested by: Jeffrey Pieper <jeffrey.e.pieper@intel.com> MFC after: 2 days Relnotes: yes Sponsored by: Intel Corporation Differential Revision: https://reviews.freebsd.org/D46951
This commit is contained in:
parent
440addc642
commit
f377a0c7df
7 changed files with 128 additions and 36 deletions
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@ -879,16 +879,35 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
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struct ice_ctl_q_ring *sq = &cq->sq;
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u16 ntc = sq->next_to_clean;
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struct ice_aq_desc *desc;
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u32 head;
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desc = ICE_CTL_Q_DESC(*sq, ntc);
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while (rd32(hw, cq->sq.head) != ntc) {
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ice_debug(hw, ICE_DBG_AQ_MSG, "ntc %d head %d.\n", ntc, rd32(hw, cq->sq.head));
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head = rd32(hw, sq->head);
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if (head >= sq->count) {
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ice_debug(hw, ICE_DBG_AQ_MSG,
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"Read head value (%d) exceeds allowed range.\n",
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head);
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return 0;
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}
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while (head != ntc) {
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ice_debug(hw, ICE_DBG_AQ_MSG,
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"ntc %d head %d.\n",
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ntc, head);
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ice_memset(desc, 0, sizeof(*desc), ICE_DMA_MEM);
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ntc++;
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if (ntc == sq->count)
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ntc = 0;
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desc = ICE_CTL_Q_DESC(*sq, ntc);
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head = rd32(hw, sq->head);
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if (head >= sq->count) {
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ice_debug(hw, ICE_DBG_AQ_MSG,
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"Read head value (%d) exceeds allowed range.\n",
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head);
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return 0;
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}
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}
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sq->next_to_clean = ntc;
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@ -62,16 +62,16 @@
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* @var ice_rc_version
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* @brief driver release candidate version number
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*/
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const char ice_driver_version[] = "1.42.5-k";
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const char ice_driver_version[] = "1.43.2-k";
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const uint8_t ice_major_version = 1;
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const uint8_t ice_minor_version = 42;
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const uint8_t ice_patch_version = 5;
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const uint8_t ice_minor_version = 43;
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const uint8_t ice_patch_version = 2;
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const uint8_t ice_rc_version = 0;
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#define PVIDV(vendor, devid, name) \
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PVID(vendor, devid, name " - 1.42.5-k")
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PVID(vendor, devid, name " - 1.43.2-k")
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#define PVIDV_OEM(vendor, devid, svid, sdevid, revid, name) \
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PVID_OEM(vendor, devid, svid, sdevid, revid, name " - 1.42.5-k")
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PVID_OEM(vendor, devid, svid, sdevid, revid, name " - 1.43.2-k")
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/**
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* @var ice_vendor_info_array
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@ -3308,7 +3308,8 @@ ice_sysctl_advertise_speed(SYSCTL_HANDLER_ARGS)
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pi->phy.curr_user_speed_req = sysctl_speeds;
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if (!ice_test_state(&sc->state, ICE_STATE_LINK_ACTIVE_ON_DOWN) && !sc->link_up)
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if (!ice_test_state(&sc->state, ICE_STATE_LINK_ACTIVE_ON_DOWN) &&
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!sc->link_up && !(if_getflags(sc->ifp) & IFF_UP))
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return 0;
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/* Apply settings requested by user */
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@ -6246,11 +6247,12 @@ ice_sysctl_dump_state_flags(SYSCTL_HANDLER_ARGS)
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"\n\t 0x20000 - Resources" \
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"\n\t 0x40000 - ACL" \
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"\n\t 0x80000 - PTP" \
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"\n\t 0x100000 - Admin Queue messages" \
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"\n\t 0x200000 - Admin Queue descriptors" \
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"\n\t 0x400000 - Admin Queue descriptor buffers" \
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"\n\t 0x800000 - Admin Queue commands" \
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"\n\t 0x1000000 - Parser" \
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"\n\t ..." \
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"\n\t 0x1000000 - Admin Queue messages" \
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"\n\t 0x2000000 - Admin Queue descriptors" \
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"\n\t 0x4000000 - Admin Queue descriptor buffers" \
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"\n\t 0x8000000 - Admin Queue commands" \
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"\n\t 0x10000000 - Parser" \
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"\n\t ..." \
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"\n\t 0x80000000 - (Reserved for user)" \
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"\n\t" \
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@ -9493,15 +9495,28 @@ ice_init_link_configuration(struct ice_softc *sc)
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struct ice_port_info *pi = sc->hw.port_info;
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struct ice_hw *hw = &sc->hw;
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device_t dev = sc->dev;
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int status;
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int status, retry_count = 0;
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retry:
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pi->phy.get_link_info = true;
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status = ice_get_link_status(pi, &sc->link_up);
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if (status) {
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device_printf(dev,
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"%s: ice_get_link_status failed; status %s, aq_err %s\n",
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__func__, ice_status_str(status),
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ice_aq_str(hw->adminq.sq_last_status));
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if (hw->adminq.sq_last_status == ICE_AQ_RC_EAGAIN) {
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retry_count++;
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ice_debug(hw, ICE_DBG_LINK,
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"%s: ice_get_link_status failed with EAGAIN, attempt %d\n",
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__func__, retry_count);
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if (retry_count < ICE_LINK_AQ_MAX_RETRIES) {
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ice_msec_pause(ICE_LINK_RETRY_DELAY);
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goto retry;
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}
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} else {
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device_printf(dev,
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"%s: ice_get_link_status failed; status %s, aq_err %s\n",
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__func__, ice_status_str(status),
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ice_aq_str(hw->adminq.sq_last_status));
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}
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return;
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}
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@ -395,6 +395,16 @@ enum ice_rx_dtype {
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*/
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#define ICE_I2C_MAX_RETRIES 10
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/*
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* The Get Link Status AQ command and other link commands can return
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* EAGAIN, indicating that the FW Link Management engine is busy.
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* Define the number of times that the driver should retry sending these
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* commands and the amount of time it should wait between those retries
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* (in milliseconds) here.
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*/
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#define ICE_LINK_AQ_MAX_RETRIES 10
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#define ICE_LINK_RETRY_DELAY 17
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/*
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* The Start LLDP Agent AQ command will fail if it's sent too soon after
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* the LLDP agent is stopped. The period between the stop and start
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@ -698,6 +708,7 @@ enum ice_state {
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ICE_STATE_FIRST_INIT_LINK,
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ICE_STATE_DO_CREATE_MIRR_INTFC,
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ICE_STATE_DO_DESTROY_MIRR_INTFC,
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ICE_STATE_PHY_FW_INIT_PENDING,
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/* This entry must be last */
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ICE_STATE_LAST,
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};
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@ -1052,6 +1052,8 @@ ice_state_to_str(enum ice_state state)
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return "DO_CREATE_MIRR_INTFC";
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case ICE_STATE_DO_DESTROY_MIRR_INTFC:
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return "DO_DESTROY_MIRR_INTFC";
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case ICE_STATE_PHY_FW_INIT_PENDING:
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return "PHY_FW_INIT_PENDING";
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case ICE_STATE_LAST:
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return NULL;
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}
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@ -4292,8 +4292,6 @@ ice_replay_vsi_fltr(struct ice_hw *hw, struct ice_port_info *pi,
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if (!itr->vsi_list_info ||
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!ice_is_bit_set(itr->vsi_list_info->vsi_map, vsi_handle))
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continue;
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/* Clearing it so that the logic can add it back */
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ice_clear_bit(vsi_handle, itr->vsi_list_info->vsi_map);
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f_entry.fltr_info.vsi_handle = vsi_handle;
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f_entry.fltr_info.fltr_act = ICE_FWD_TO_VSI;
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/* update the src in case it is VSI num */
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@ -84,6 +84,7 @@ static int ice_if_i2c_req(if_ctx_t ctx, struct ifi2creq *req);
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static int ice_if_suspend(if_ctx_t ctx);
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static int ice_if_resume(if_ctx_t ctx);
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static bool ice_if_needs_restart(if_ctx_t ctx, enum iflib_restart_event event);
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static void ice_init_link(struct ice_softc *sc);
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static int ice_setup_mirror_vsi(struct ice_mirr_if *mif);
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static int ice_wire_mirror_intrs(struct ice_mirr_if *mif);
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static void ice_free_irqvs_subif(struct ice_mirr_if *mif);
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@ -833,9 +834,8 @@ ice_if_attach_post(if_ctx_t ctx)
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/* Get DCBX/LLDP state and start DCBX agent */
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ice_init_dcb_setup(sc);
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/* Setup link configuration parameters */
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ice_init_link_configuration(sc);
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ice_update_link_status(sc, true);
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/* Setup link, if PHY FW is ready */
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ice_init_link(sc);
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/* Configure interrupt causes for the administrative interrupt */
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ice_configure_misc_interrupts(sc);
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@ -2136,6 +2136,18 @@ ice_poll_for_media_avail(struct ice_softc *sc)
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struct ice_hw *hw = &sc->hw;
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struct ice_port_info *pi = hw->port_info;
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/* E830 only: There's no interrupt for when the PHY FW has finished loading,
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* so poll for the status in the media task here if it's previously
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* been detected that it's still loading.
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*/
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if (ice_is_e830(hw) &&
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ice_test_state(&sc->state, ICE_STATE_PHY_FW_INIT_PENDING)) {
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if (rd32(hw, GL_MNG_FWSM) & GL_MNG_FWSM_FW_LOADING_M)
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ice_clear_state(&sc->state, ICE_STATE_PHY_FW_INIT_PENDING);
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else
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return;
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}
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if (ice_test_state(&sc->state, ICE_STATE_NO_MEDIA)) {
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pi->phy.get_link_info = true;
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ice_get_link_status(pi, &sc->link_up);
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@ -2705,11 +2717,11 @@ ice_rebuild(struct ice_softc *sc)
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if (hw->port_info->qos_cfg.is_sw_lldp)
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ice_add_rx_lldp_filter(sc);
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/* Refresh link status */
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/* Apply previous link settings and refresh link status, if PHY
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* FW is ready.
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*/
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ice_clear_state(&sc->state, ICE_STATE_LINK_STATUS_REPORTED);
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sc->hw.port_info->phy.get_link_info = true;
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ice_get_link_status(sc->hw.port_info, &sc->link_up);
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ice_update_link_status(sc, true);
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ice_init_link(sc);
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/* RDMA interface will be restarted by the stack re-init */
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@ -2795,12 +2807,23 @@ ice_handle_reset_event(struct ice_softc *sc)
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* resetting.
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*/
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IFLIB_CTX_UNLOCK(sc);
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#define ICE_EMPR_ADDL_WAIT_MSEC_SLOW 20000
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if ((ice_is_e830(hw) || ice_is_e825c(hw)) &&
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(((rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_RESET_TYPE_M) >>
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GLGEN_RSTAT_RESET_TYPE_S) == ICE_RESET_EMPR))
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ice_msec_pause(ICE_EMPR_ADDL_WAIT_MSEC_SLOW);
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status = ice_check_reset(hw);
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IFLIB_CTX_LOCK(sc);
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if (status) {
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device_printf(dev, "Device never came out of reset, err %s\n",
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ice_status_str(status));
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ice_set_state(&sc->state, ICE_STATE_RESET_FAILED);
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ice_clear_state(&sc->state, ICE_STATE_RESET_PFR_REQ);
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ice_clear_state(&sc->state, ICE_STATE_PREPARED_FOR_RESET);
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device_printf(dev, "Reset failed; please reload the device driver\n");
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return;
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}
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@ -2888,16 +2911,8 @@ ice_init_device_features(struct ice_softc *sc)
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if (ice_is_e810(hw))
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ice_set_bit(ICE_FEATURE_PHY_STATISTICS, sc->feat_en);
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/* Set capabilities based on device */
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switch (hw->device_id) {
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case ICE_DEV_ID_E825C_BACKPLANE:
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case ICE_DEV_ID_E825C_QSFP:
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case ICE_DEV_ID_E825C_SFP:
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if (ice_is_e825c(hw))
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ice_set_bit(ICE_FEATURE_DUAL_NAC, sc->feat_cap);
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break;
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default:
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break;
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}
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/* Disable features due to hardware limitations... */
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if (!hw->func_caps.common_cap.rss_table_size)
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ice_clear_bit(ICE_FEATURE_RSS, sc->feat_cap);
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@ -3303,6 +3318,38 @@ ice_if_needs_restart(if_ctx_t ctx, enum iflib_restart_event event)
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}
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}
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/**
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* ice_init_link - Do link configuration and link status reporting
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* @sc: driver private structure
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*
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* Contains an extra check that skips link config when an E830 device
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* does not have the "FW_LOADING"/"PHYBUSY" bit set in GL_MNG_FWSM set.
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*/
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static void
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ice_init_link(struct ice_softc *sc)
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{
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struct ice_hw *hw = &sc->hw;
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device_t dev = sc->dev;
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/* Check if FW is ready before setting up link; defer setup to the
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* admin task if it isn't.
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*/
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if (ice_is_e830(hw) &&
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(rd32(hw, GL_MNG_FWSM) & GL_MNG_FWSM_FW_LOADING_M)) {
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ice_set_state(&sc->state, ICE_STATE_PHY_FW_INIT_PENDING);
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device_printf(dev,
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"Link initialization is blocked by PHY FW initialization.\n");
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device_printf(dev,
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"Link initialization will continue after PHY FW initialization completes.\n");
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/* Do not access PHY config while PHY FW is busy initializing */
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} else {
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ice_clear_state(&sc->state, ICE_STATE_PHY_FW_INIT_PENDING);
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ice_init_link_configuration(sc);
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ice_update_link_status(sc, true);
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}
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}
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extern struct if_txrx ice_subif_txrx;
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/**
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