mirror of
https://github.com/opnsense/src.git
synced 2026-05-28 04:12:45 -04:00
Better implement SMP support:
o Do not use a special struct to keep track of CPUs we found; instead, use struct pcpu. This handles all the magic WRT thread creation (yay!). o Respect MAXCPU. o Use the vhpt_base and vhpt_size values to initialize the AP. o Style fixes. Note that this commit temporarily breaks SMP configurations. Previously APs didn't do anything, but they now enter the scheduler. They hold sched_lock for more than 5 secs though and cause a panic. That's what I call progress :-)
This commit is contained in:
Marcel Moolenaar
parent
0f0658df4c
commit
f3366cc25b
3 changed files with 181 additions and 102 deletions
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@ -145,7 +145,6 @@ ENTRY(mi_startup_trampoline, 0)
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END(mi_startup_trampoline)
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#ifdef SMP
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/*
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* AP wake-up entry point. The handoff state is similar as for the BSP,
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* as described on page 3-9 of the IPF SAL Specification. The difference
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@ -205,7 +204,7 @@ ENTRY(os_boot_rendez,0)
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;;
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1: mov r16 = ip
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add r17 = 2f-1b, r17
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movl r18 = (IA64_PSR_AC|IA64_PSR_IC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_IT|IA64_PSR_BN)
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movl r18 = (IA64_PSR_AC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_IT|IA64_PSR_BN)
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;;
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add r17 = r17, r16
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mov cr.ipsr = r18
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@ -217,29 +216,55 @@ ENTRY(os_boot_rendez,0)
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.align 32
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2: movl r16 = ia64_vector_table // set up IVT early
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movl r17 = ia64_vhpt+(1<<8)+(15<<2)+1 // and VHPT
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;;
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mov cr.iva = r16
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mov cr.pta = r17
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;;
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srlz.i
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;;
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srlz.d
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movl r16 = ap_stack
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movl r17 = ap_pcpu
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mov ar.rsc = 0
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movl gp = __gp
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;;
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ld8 r16 = [r16]
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mov r17 = KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
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ld8 r17 = [r17]
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mov r18 = KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
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;;
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add sp = r17, r16
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add sp = r18, r16
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mov ar.bspstore = r16
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mov ar.k4 = r17
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mov r13 = r17 /* gas doesn't know tp as an alias for r13 */
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;;
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loadrs
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movl r16 = ia64_pal_base
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;;
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mov ar.rsc = 3
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ld8 r16 = [r16]
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;;
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alloc r16 = ar.pfs, 0, 0, 0, 0
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cmp.eq p1, p0 = 0, r16
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(p1) br.cond.spnt 1f
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;;
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mov r18 = 28<<2
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movl r17 = 7<<61
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;;
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mov cr.itir = r18
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or r17 = r17, r16
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mov r16 = (PTE_P|PTE_MA_WB|PTE_A|PTE_D|PTE_PL_KERN|PTE_AR_RWX)
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;;
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mov cr.ifa = r17
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extr.u r18 = r17, 12, 38
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;;
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srlz.i
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shl r18 = r18, 12
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;;
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add r17 = 1, r0
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or r16 = r16, r18
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;;
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itr.i itr[r17] = r16
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;;
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srlz.i
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;;
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1: alloc r16 = ar.pfs, 0, 0, 0, 0
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;;
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br.call.sptk.few rp = ia64_ap_startup
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/* NOT REACHED */
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@ -145,7 +145,6 @@ ENTRY(mi_startup_trampoline, 0)
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END(mi_startup_trampoline)
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#ifdef SMP
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/*
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* AP wake-up entry point. The handoff state is similar as for the BSP,
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* as described on page 3-9 of the IPF SAL Specification. The difference
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@ -205,7 +204,7 @@ ENTRY(os_boot_rendez,0)
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;;
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1: mov r16 = ip
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add r17 = 2f-1b, r17
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movl r18 = (IA64_PSR_AC|IA64_PSR_IC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_IT|IA64_PSR_BN)
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movl r18 = (IA64_PSR_AC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_IT|IA64_PSR_BN)
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;;
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add r17 = r17, r16
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mov cr.ipsr = r18
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@ -217,29 +216,55 @@ ENTRY(os_boot_rendez,0)
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.align 32
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2: movl r16 = ia64_vector_table // set up IVT early
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movl r17 = ia64_vhpt+(1<<8)+(15<<2)+1 // and VHPT
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;;
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mov cr.iva = r16
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mov cr.pta = r17
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;;
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srlz.i
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;;
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srlz.d
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movl r16 = ap_stack
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movl r17 = ap_pcpu
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mov ar.rsc = 0
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movl gp = __gp
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;;
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ld8 r16 = [r16]
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mov r17 = KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
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ld8 r17 = [r17]
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mov r18 = KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
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;;
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add sp = r17, r16
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add sp = r18, r16
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mov ar.bspstore = r16
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mov ar.k4 = r17
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mov r13 = r17 /* gas doesn't know tp as an alias for r13 */
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;;
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loadrs
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movl r16 = ia64_pal_base
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;;
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mov ar.rsc = 3
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ld8 r16 = [r16]
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;;
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alloc r16 = ar.pfs, 0, 0, 0, 0
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cmp.eq p1, p0 = 0, r16
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(p1) br.cond.spnt 1f
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;;
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mov r18 = 28<<2
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movl r17 = 7<<61
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;;
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mov cr.itir = r18
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or r17 = r17, r16
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mov r16 = (PTE_P|PTE_MA_WB|PTE_A|PTE_D|PTE_PL_KERN|PTE_AR_RWX)
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;;
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mov cr.ifa = r17
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extr.u r18 = r17, 12, 38
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;;
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srlz.i
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shl r18 = r18, 12
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;;
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add r17 = 1, r0
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or r16 = r16, r18
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;;
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itr.i itr[r17] = r16
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;;
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srlz.i
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;;
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1: alloc r16 = ar.pfs, 0, 0, 0, 0
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;;
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br.call.sptk.few rp = ia64_ap_startup
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/* NOT REACHED */
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@ -40,6 +40,8 @@
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_extern.h>
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#include <vm/vm_kern.h>
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#include <machine/atomic.h>
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#include <machine/pal.h>
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@ -47,57 +49,52 @@
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#include <machine/clock.h>
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#include <machine/sal.h>
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void cpu_mp_add(uint, uint, uint);
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void ia64_ap_startup(void);
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void map_pal_code(void);
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extern vm_offset_t vhpt_base, vhpt_size;
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#define LID_SAPIC_ID(x) ((int)((x) >> 24) & 0xff)
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#define LID_SAPIC_EID(x) ((int)((x) >> 16) & 0xff)
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static MALLOC_DEFINE(M_SMP, "smp", "SMP structures");
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static void ipi_send(u_int64_t, int);
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static void cpu_mp_unleash(void *);
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struct mp_cpu {
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TAILQ_ENTRY(mp_cpu) cpu_next;
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u_int64_t cpu_lid; /* Local processor ID */
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int32_t cpu_no; /* Sequential CPU number */
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u_int32_t cpu_bsp:1; /* 1=BSP; 0=AP */
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u_int32_t cpu_awake:1; /* 1=Awake; 0=sleeping */
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void *cpu_stack;
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};
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#define LID_SAPIC_SET(id,eid) (((id & 0xff) << 8 | (eid & 0xff)) << 16);
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#define LID_SAPIC_MASK 0xffff0000UL
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int mp_hardware = 0;
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int mp_ipi_vector[IPI_COUNT];
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int mp_ipi_test = 0;
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/* Variables used by os_boot_rendez */
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volatile void *ap_stack;
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volatile vm_offset_t ap_stack;
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volatile struct pcpu *ap_pcpu;
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volatile int ap_delay;
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volatile int ap_awake;
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TAILQ_HEAD(, mp_cpu) ia64_cpus = TAILQ_HEAD_INITIALIZER(ia64_cpus);
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static void ipi_send(u_int64_t, int);
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static void cpu_mp_unleash(void *);
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void
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ia64_ap_startup(void)
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{
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#if 0
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struct mp_cpu *cpu;
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u_int64_t lid = ia64_get_lid() & 0xffff0000L;
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#endif
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__asm __volatile("mov cr.pta=%0;; srlz.i;;" ::
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"r" (vhpt_base + (1<<8) + (vhpt_size<<2) + 1));
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ap_awake = 1;
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ap_delay = 0;
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while (1);
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#if 0
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TAILQ_FOREACH(cpu, &ia64_cpus, cpu_next) {
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if (cpu->cpu_lid == lid)
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break;
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}
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/* Wait until it's time for us to be unleashed */
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while (!smp_started);
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KASSERT(cpu != NULL, ("foo!"));
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CTR1(KTR_SMP, "SMP: cpu%d launched", PCPU_GET(cpuid));
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cpu->cpu_lid = ia64_get_lid();
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cpu->cpu_awake = 1;
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#endif
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__asm __volatile("ssm psr.ic|psr.i;; srlz.i;;");
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microuptime(PCPU_PTR(switchtime));
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PCPU_SET(switchticks, ticks);
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mtx_lock_spin(&sched_lock);
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cpu_throw();
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panic(__func__ ": cpu_throw() returned");
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}
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int
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@ -113,66 +110,90 @@ cpu_mp_probe()
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void
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cpu_mp_add(uint acpiid, uint apicid, uint apiceid)
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{
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struct mp_cpu *cpu;
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u_int64_t bsp = ia64_get_lid() & 0xffff0000L;
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struct pcpu *pc;
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u_int64_t lid;
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cpu = malloc(sizeof(*cpu), M_SMP, M_WAITOK|M_ZERO);
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if (cpu == NULL)
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return;
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TAILQ_INSERT_TAIL(&ia64_cpus, cpu, cpu_next);
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cpu->cpu_no = acpiid;
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cpu->cpu_lid = ((apicid & 0xff) << 8 | (apiceid & 0xff)) << 16;
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if (cpu->cpu_lid == bsp)
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cpu->cpu_bsp = 1;
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all_cpus |= (1 << acpiid);
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/* Count all CPUs, even the ones we cannot use */
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mp_ncpus++;
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/* Ignore any processor numbers outside our range */
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if (acpiid >= MAXCPU) {
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printf("SMP: cpu%d skipped; increase MAXCPU\n", acpiid);
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return;
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}
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KASSERT((all_cpus & (1UL << acpiid)) == 0,
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(__func__ ": cpu%d already in CPU map", acpiid));
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lid = LID_SAPIC_SET(apicid, apiceid);
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if ((ia64_get_lid() & LID_SAPIC_MASK) == lid) {
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KASSERT(acpiid == 0,
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(__func__ ": the BSP must be cpu0"));
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}
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if (acpiid != 0) {
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pc = (struct pcpu *)kmem_alloc(kernel_map, PAGE_SIZE);
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pcpu_init(pc, acpiid, PAGE_SIZE);
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} else
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pc = pcpup;
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pc->pc_lid = lid;
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all_cpus |= (1UL << acpiid);
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}
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void
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cpu_mp_announce()
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{
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struct mp_cpu *cpu;
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struct pcpu *pc;
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int i;
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TAILQ_FOREACH(cpu, &ia64_cpus, cpu_next) {
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printf("cpu%d: SAPIC Id=%x, SAPIC Eid=%x", cpu->cpu_no,
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LID_SAPIC_ID(cpu->cpu_lid), LID_SAPIC_EID(cpu->cpu_lid));
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if (cpu->cpu_bsp)
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printf(" (BSP)\n");
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else
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printf("\n");
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for (i = 0; i < MAXCPU; i++) {
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pc = pcpu_find(i);
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if (pc != NULL) {
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printf("cpu%d: SAPIC Id=%x, SAPIC Eid=%x", i,
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LID_SAPIC_ID(pc->pc_lid),
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LID_SAPIC_EID(pc->pc_lid));
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if (i == 0)
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printf(" (BSP)\n");
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else
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printf("\n");
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}
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}
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}
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void
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cpu_mp_start()
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{
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struct mp_cpu *cpu;
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struct pcpu *pc;
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TAILQ_FOREACH(cpu, &ia64_cpus, cpu_next) {
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if (!cpu->cpu_bsp) {
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cpu->cpu_stack = malloc(KSTACK_PAGES * PAGE_SIZE,
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M_SMP, M_WAITOK);
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if (bootverbose)
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printf("SMP: waking up cpu%d\n", cpu->cpu_no);
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ap_stack = cpu->cpu_stack;
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SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
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#if 0
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pc->pc_current_pmap = PCPU_GET(current_pmap);
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#endif
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pc->pc_other_cpus = all_cpus & ~(1UL << pc->pc_cpuid);
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if (pc->pc_cpuid > 0) {
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ap_stack = kmem_alloc(kernel_map,
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KSTACK_PAGES * PAGE_SIZE);
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ap_pcpu = pc;
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ap_delay = 2000;
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ap_awake = 0;
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ipi_send(cpu->cpu_lid, IPI_AP_WAKEUP);
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if (bootverbose)
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printf("SMP: waking up cpu%d\n", pc->pc_cpuid);
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ipi_send(pc->pc_lid, IPI_AP_WAKEUP);
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do {
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DELAY(1000);
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} while (--ap_delay > 0);
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cpu->cpu_awake = (ap_awake) ? 1 : 0;
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pc->pc_awake = ap_awake;
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if (bootverbose && !ap_awake)
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if (!ap_awake)
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printf("SMP: WARNING: cpu%d did not wake up\n",
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cpu->cpu_no);
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pc->pc_cpuid);
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} else {
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cpu->cpu_lid = ia64_get_lid();
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cpu->cpu_awake = 1;
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pc->pc_awake = 1;
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ipi_self(IPI_TEST);
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}
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}
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@ -181,21 +202,30 @@ cpu_mp_start()
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static void
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cpu_mp_unleash(void *dummy)
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{
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struct mp_cpu *cpu;
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int awake = 0;
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struct pcpu *pc;
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int cpus;
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if (!mp_hardware)
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return;
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if (mp_ipi_test != 1)
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printf("SMP: sending of a test IPI to BSP failed\n");
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printf("SMP: WARNING: sending of a test IPI failed\n");
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TAILQ_FOREACH(cpu, &ia64_cpus, cpu_next) {
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awake += cpu->cpu_awake;
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cpus = 0;
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smp_cpus = 0;
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SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
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cpus++;
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if (pc->pc_awake)
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smp_cpus++;
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}
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if (awake != mp_ncpus)
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printf("SMP: %d CPU(s) didn't get woken\n", mp_ncpus - awake);
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if (smp_cpus != cpus || cpus != mp_ncpus) {
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printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n",
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mp_ncpus, cpus, smp_cpus);
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}
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smp_active = 1;
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smp_started = 1;
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}
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/*
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@ -204,11 +234,11 @@ cpu_mp_unleash(void *dummy)
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void
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ipi_selected(u_int64_t cpus, int ipi)
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{
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struct mp_cpu *cpu;
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struct pcpu *pc;
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TAILQ_FOREACH(cpu, &ia64_cpus, cpu_next) {
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if (cpus & (1 << cpu->cpu_no))
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ipi_send(cpu->cpu_lid, ipi);
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SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
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if (cpus & (1UL << pc->pc_cpuid))
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ipi_send(pc->pc_lid, ipi);
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}
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}
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@ -218,10 +248,10 @@ ipi_selected(u_int64_t cpus, int ipi)
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void
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ipi_all(int ipi)
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{
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struct mp_cpu *cpu;
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struct pcpu *pc;
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|
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TAILQ_FOREACH(cpu, &ia64_cpus, cpu_next) {
|
||||
ipi_send(cpu->cpu_lid, ipi);
|
||||
SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
|
||||
ipi_send(pc->pc_lid, ipi);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -231,12 +261,11 @@ ipi_all(int ipi)
|
|||
void
|
||||
ipi_all_but_self(int ipi)
|
||||
{
|
||||
struct mp_cpu *cpu;
|
||||
u_int64_t lid = ia64_get_lid();
|
||||
struct pcpu *pc;
|
||||
|
||||
TAILQ_FOREACH(cpu, &ia64_cpus, cpu_next) {
|
||||
if (cpu->cpu_lid != lid)
|
||||
ipi_send(cpu->cpu_lid, ipi);
|
||||
SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
|
||||
if (pc != pcpup)
|
||||
ipi_send(pc->pc_lid, ipi);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -262,7 +291,7 @@ ipi_send(u_int64_t lid, int ipi)
|
|||
u_int64_t vector;
|
||||
|
||||
pipi = ia64_memory_address(PAL_PIB_DEFAULT_ADDR |
|
||||
((lid >> 12) & 0xFFFF0L));
|
||||
((lid & LID_SAPIC_MASK) >> 12));
|
||||
vector = (u_int64_t)(mp_ipi_vector[ipi] & 0xff);
|
||||
*pipi = vector;
|
||||
ia64_mf_a();
|
||||
|
|
|
|||
Loading…
Reference in a new issue