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Mention in the documentation that the AOpen/Acer ALN-320 is a supported

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ethernet card (PCI, VIA Rhine II chipset).
This commit is contained in:
Bill Paul 1999-09-22 19:46:14 +00:00
parent 30b7a8f12e
commit efee742ecc
9 changed files with 26 additions and 17 deletions
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1
release/texts/alpha/HARDWARE.TXT
View file

@ -351,6 +351,7 @@ VIA Technologies VT3043 "Rhine I" and VT86C100A "Rhine II" fast ethernet
NICs including the following:
Hawking Technologies PN102TX
D-Link DFE-530TX
AOpen/Acer ALN-320
Silicon Integrated Systems SiS 900 and SiS 7016 PCI fast ethernet NICs

1
release/texts/alpha/RELNOTES.TXT
View file

@ -309,6 +309,7 @@ VIA Technologies VT3043 "Rhine I" and VT86C100A "Rhine II" fast ethernet
NICs including the following:
Hawking Technologies PN102TX
D-Link DFE-530TX
AOpen/Acer ALN-320
Silicon Integrated Systems SiS 900 and SiS 7016 PCI fast ethernet NICs

1
release/texts/i386/HARDWARE.TXT
View file

@ -483,6 +483,7 @@ VIA Technologies VT3043 "Rhine I" and VT86C100A "Rhine II" fast ethernet
NICs including the following:
Hawking Technologies PN102TX
D-Link DFE-530TX
AOpen/Acer ALN-320
Silicon Integrated Systems SiS 900 and SiS 7016 PCI fast ethernet NICs

1
release/texts/i386/RELNOTES.TXT
View file

@ -309,6 +309,7 @@ VIA Technologies VT3043 "Rhine I" and VT86C100A "Rhine II" fast ethernet
NICs including the following:
Hawking Technologies PN102TX
D-Link DFE-530TX
AOpen/Acer ALN-320
Silicon Integrated Systems SiS 900 and SiS 7016 PCI fast ethernet NICs

15
share/man/man4/man4.i386/vr.4
View file

@ -45,15 +45,16 @@ The
driver provides support for PCI ethernet adapters and embedded
controllers based on the VIA Technologies VT3043 Rhine I and
VT86C100A Rhine II fast ethernet controller chips. This includes
the D-Link DFE530-TX and various other commodity fast ethernet
the D-Link DFE530-TX, the Hawking Technologies PN102TX, the
AOpen/Acer ALN-320, and various other commodity fast ethernet
cards.
.Pp
The VIA Rhine chips use bus master DMA and have a software interface
designed to resemble that of the DEC 21x4x "tulip" chips. The major
differences are that the receive filter in the Rhine chips is
much simpler and is programmed through registers rather than by
downloading a special setup frame through the transmit DMA engine,
and that transmit and receive DMA buffers must be longword
The VIA Rhine chips use bus master DMA and have a descriptor layout
designed to resemble that of the DEC 21x4x "tulip" chips. The register
layout is different however and the receive filter in the Rhine chips
is much simpler and is programmed through registers rather than by
downloading a special setup frame through the transmit DMA engine.
Transmit and receive DMA buffers must be longword
aligned. The Rhine chips are meant to be interfaced with external
physical layer devices via an MII bus. They support both
10 and 100Mbps speeds in either full or half duplex.

15
share/man/man4/vr.4
View file

@ -45,15 +45,16 @@ The
driver provides support for PCI ethernet adapters and embedded
controllers based on the VIA Technologies VT3043 Rhine I and
VT86C100A Rhine II fast ethernet controller chips. This includes
the D-Link DFE530-TX and various other commodity fast ethernet
the D-Link DFE530-TX, the Hawking Technologies PN102TX, the
AOpen/Acer ALN-320, and various other commodity fast ethernet
cards.
.Pp
The VIA Rhine chips use bus master DMA and have a software interface
designed to resemble that of the DEC 21x4x "tulip" chips. The major
differences are that the receive filter in the Rhine chips is
much simpler and is programmed through registers rather than by
downloading a special setup frame through the transmit DMA engine,
and that transmit and receive DMA buffers must be longword
The VIA Rhine chips use bus master DMA and have a descriptor layout
designed to resemble that of the DEC 21x4x "tulip" chips. The register
layout is different however and the receive filter in the Rhine chips
is much simpler and is programmed through registers rather than by
downloading a special setup frame through the transmit DMA engine.
Transmit and receive DMA buffers must be longword
aligned. The Rhine chips are meant to be interfaced with external
physical layer devices via an MII bus. They support both
10 and 100Mbps speeds in either full or half duplex.

3
sys/conf/NOTES
View file

@ -1631,7 +1631,8 @@ controller miibus0
#
# The `vr' device provides support for various fast ethernet adapters
# based on the VIA Technologies VT3043 `Rhine I' and VT86C100A `Rhine II'
# chips, including the D-Link DFE530TX.
# chips, including the D-Link DFE530TX, the Hawking Technologies PN102TX,
# and the AOpen/Acer ALN-320.
#
# The `vx' device provides support for the 3Com 3C590 and 3C595
# early support

3
sys/i386/conf/LINT
View file

@ -1631,7 +1631,8 @@ controller miibus0
#
# The `vr' device provides support for various fast ethernet adapters
# based on the VIA Technologies VT3043 `Rhine I' and VT86C100A `Rhine II'
# chips, including the D-Link DFE530TX.
# chips, including the D-Link DFE530TX, the Hawking Technologies PN102TX,
# and the AOpen/Acer ALN-320.
#
# The `vx' device provides support for the 3Com 3C590 and 3C595
# early support

3
sys/i386/conf/NOTES
View file

@ -1631,7 +1631,8 @@ controller miibus0
#
# The `vr' device provides support for various fast ethernet adapters
# based on the VIA Technologies VT3043 `Rhine I' and VT86C100A `Rhine II'
# chips, including the D-Link DFE530TX.
# chips, including the D-Link DFE530TX, the Hawking Technologies PN102TX,
# and the AOpen/Acer ALN-320.
#
# The `vx' device provides support for the 3Com 3C590 and 3C595
# early support