From eef5873fc1f8134337779d9fd5d5c4994a2f8929 Mon Sep 17 00:00:00 2001 From: Mateusz Guzik Date: Tue, 1 Sep 2020 21:42:08 +0000 Subject: [PATCH] bce: clean up empty lines in .c and .h files --- sys/dev/bce/if_bce.c | 189 ---------------------------------------- sys/dev/bce/if_bcefw.h | 16 ---- sys/dev/bce/if_bcereg.h | 41 --------- 3 files changed, 246 deletions(-) diff --git a/sys/dev/bce/if_bce.c b/sys/dev/bce/if_bce.c index 7a9f8b97ddd..d6c5a2bf091 100644 --- a/sys/dev/bce/if_bce.c +++ b/sys/dev/bce/if_bce.c @@ -199,11 +199,9 @@ static const struct bce_type bce_devs[] = { /* BCM5716 controllers and OEM boards. */ { BRCM_VENDORID, BRCM_DEVICEID_BCM5716, PCI_ANY_ID, PCI_ANY_ID, "QLogic NetXtreme II BCM5716 1000Base-T" }, - { 0, 0, 0, 0, NULL } }; - /****************************************************************************/ /* Supported Flash NVRAM device data. */ /****************************************************************************/ @@ -313,7 +311,6 @@ static const struct flash_spec flash_5709 = { .name = "5709/5716 buffered flash (256kB)", }; - /****************************************************************************/ /* FreeBSD device entry points. */ /****************************************************************************/ @@ -322,7 +319,6 @@ static int bce_attach (device_t); static int bce_detach (device_t); static int bce_shutdown (device_t); - /****************************************************************************/ /* BCE Debug Data Structure Dump Routines */ /****************************************************************************/ @@ -365,7 +361,6 @@ static void bce_dump_rv2p_state (struct bce_softc *); static void bce_breakpoint (struct bce_softc *); #endif /*BCE_DEBUG */ - /****************************************************************************/ /* BCE Register/Memory Access Routines */ /****************************************************************************/ @@ -488,7 +483,6 @@ static void bce_tick (void *); static void bce_pulse (void *); static void bce_add_sysctls (struct bce_softc *); - /****************************************************************************/ /* FreeBSD device dispatch table. */ /****************************************************************************/ @@ -667,7 +661,6 @@ static int bce_rx_ticks = DEFAULT_RX_TICKS; SYSCTL_UINT(_hw_bce, OID_AUTO, rx_ticks, CTLFLAG_RDTUN, &bce_rx_ticks, 0, "Receive ticks count"); - /****************************************************************************/ /* Device probe function. */ /* */ @@ -703,11 +696,9 @@ bce_probe(device_t dev) /* Look through the list of known devices for a match. */ while(t->bce_name != NULL) { - if ((vid == t->bce_vid) && (did == t->bce_did) && ((svid == t->bce_svid) || (t->bce_svid == PCI_ANY_ID)) && ((sdid == t->bce_sdid) || (t->bce_sdid == PCI_ANY_ID))) { - descbuf = malloc(BCE_DEVDESC_MAX, M_TEMP, M_NOWAIT); if (descbuf == NULL) @@ -729,7 +720,6 @@ bce_probe(device_t dev) return(ENXIO); } - /****************************************************************************/ /* PCI Capabilities Probe Function. */ /* */ @@ -751,7 +741,6 @@ bce_print_adapter_info(struct bce_softc *sc) printf("Rev (%c%d); ", ((BCE_CHIP_ID(sc) & 0xf000) >> 12) + 'A', ((BCE_CHIP_ID(sc) & 0x0ff0) >> 4)); - /* Bus info. */ if (sc->bce_flags & BCE_PCIE_FLAG) { printf("Bus (PCIe x%d, ", sc->link_width); @@ -815,13 +804,11 @@ bce_print_adapter_info(struct bce_softc *sc) sc->bce_tx_quick_cons_trip, sc->bce_tx_ticks_int, sc->bce_tx_ticks); - } DBEXIT(BCE_VERBOSE_LOAD); } - /****************************************************************************/ /* PCI Capabilities Probe Function. */ /* */ @@ -872,7 +859,6 @@ bce_probe_pci_caps(device_t dev, struct bce_softc *sc) DBEXIT(BCE_VERBOSE_LOAD); } - /****************************************************************************/ /* Load and validate user tunable settings. */ /* */ @@ -1054,7 +1040,6 @@ bce_set_tunables(struct bce_softc *sc) } } - /****************************************************************************/ /* Device attach function. */ /* */ @@ -1115,7 +1100,6 @@ bce_attach(device_t dev) (bce_msi_enable >= 2) && ((sc->bce_res_irq = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE)) != NULL)) { - msi_needed = count = 1; if (((error = pci_alloc_msix(dev, &count)) != 0) || @@ -1540,7 +1524,6 @@ bce_attach_exit: return(rc); } - /****************************************************************************/ /* Device detach function. */ /* */ @@ -1593,7 +1576,6 @@ bce_detach(device_t dev) return(0); } - /****************************************************************************/ /* Device shutdown function. */ /* */ @@ -1624,7 +1606,6 @@ bce_shutdown(device_t dev) return (0); } - #ifdef BCE_DEBUG /****************************************************************************/ /* Register read. */ @@ -1641,7 +1622,6 @@ bce_reg_rd(struct bce_softc *sc, u32 offset) return val; } - /****************************************************************************/ /* Register write (16 bit). */ /* */ @@ -1656,7 +1636,6 @@ bce_reg_wr16(struct bce_softc *sc, u32 offset, u16 val) REG_WR16(sc, offset, val); } - /****************************************************************************/ /* Register write. */ /* */ @@ -1702,7 +1681,6 @@ bce_reg_rd_ind(struct bce_softc *sc, u32 offset) #endif } - /****************************************************************************/ /* Indirect register write. */ /* */ @@ -1726,7 +1704,6 @@ bce_reg_wr_ind(struct bce_softc *sc, u32 offset, u32 val) pci_write_config(dev, BCE_PCICFG_REG_WINDOW, val, 4); } - /****************************************************************************/ /* Shared memory write. */ /* */ @@ -1744,7 +1721,6 @@ bce_shmem_wr(struct bce_softc *sc, u32 offset, u32 val) bce_reg_wr_ind(sc, sc->bce_shmem_base + offset, val); } - /****************************************************************************/ /* Shared memory read. */ /* */ @@ -1764,7 +1740,6 @@ bce_shmem_rd(struct bce_softc *sc, u32 offset) return val; } - #ifdef BCE_DEBUG /****************************************************************************/ /* Context memory read. */ @@ -1787,7 +1762,6 @@ bce_ctx_rd(struct bce_softc *sc, u32 cid_addr, u32 ctx_offset) offset = ctx_offset + cid_addr; if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) { - REG_WR(sc, BCE_CTX_CTX_CTRL, (offset | BCE_CTX_CTX_CTRL_READ_REQ)); for (idx = 0; idx < retry_cnt; idx++) { @@ -1815,7 +1789,6 @@ bce_ctx_rd(struct bce_softc *sc, u32 cid_addr, u32 ctx_offset) } #endif - /****************************************************************************/ /* Context memory write. */ /* */ @@ -1839,7 +1812,6 @@ bce_ctx_wr(struct bce_softc *sc, u32 cid_addr, u32 ctx_offset, u32 ctx_val) __FUNCTION__, cid_addr)); if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) { - REG_WR(sc, BCE_CTX_CTX_DATA, ctx_val); REG_WR(sc, BCE_CTX_CTX_CTRL, (offset | BCE_CTX_CTX_CTRL_WRITE_REQ)); @@ -1861,7 +1833,6 @@ bce_ctx_wr(struct bce_softc *sc, u32 cid_addr, u32 ctx_offset, u32 ctx_val) } } - /****************************************************************************/ /* PHY register read. */ /* */ @@ -1899,7 +1870,6 @@ bce_miibus_read_reg(device_t dev, int phy, int reg) DELAY(40); } - val = BCE_MIPHY(phy) | BCE_MIREG(reg) | BCE_EMAC_MDIO_COMM_COMMAND_READ | BCE_EMAC_MDIO_COMM_DISEXT | BCE_EMAC_MDIO_COMM_START_BUSY; @@ -1927,7 +1897,6 @@ bce_miibus_read_reg(device_t dev, int phy, int reg) val = REG_RD(sc, BCE_EMAC_MDIO_COMM); } - if (sc->bce_phy_flags & BCE_PHY_INT_MODE_AUTO_POLLING_FLAG) { val = REG_RD(sc, BCE_EMAC_MDIO_MODE); val |= BCE_EMAC_MDIO_MODE_AUTO_POLL; @@ -1942,7 +1911,6 @@ bce_miibus_read_reg(device_t dev, int phy, int reg) return (val & 0xffff); } - /****************************************************************************/ /* PHY register write. */ /* */ @@ -2014,7 +1982,6 @@ bce_miibus_write_reg(device_t dev, int phy, int reg, int val) return 0; } - /****************************************************************************/ /* MII bus status change. */ /* */ @@ -2127,7 +2094,6 @@ bce_miibus_statchg_exit: DBEXIT(BCE_VERBOSE_PHY); } - /****************************************************************************/ /* Acquire NVRAM lock. */ /* */ @@ -2165,7 +2131,6 @@ bce_acquire_nvram_lock(struct bce_softc *sc) return (rc); } - /****************************************************************************/ /* Release NVRAM lock. */ /* */ @@ -2206,7 +2171,6 @@ bce_release_nvram_lock(struct bce_softc *sc) return (rc); } - #ifdef BCE_NVRAM_WRITE_SUPPORT /****************************************************************************/ /* Enable NVRAM write access. */ @@ -2251,7 +2215,6 @@ bce_enable_nvram_write(struct bce_softc *sc) return (rc); } - /****************************************************************************/ /* Disable NVRAM write access. */ /* */ @@ -2276,7 +2239,6 @@ bce_disable_nvram_write(struct bce_softc *sc) } #endif - /****************************************************************************/ /* Enable NVRAM access. */ /* */ @@ -2301,7 +2263,6 @@ bce_enable_nvram_access(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_NVRAM); } - /****************************************************************************/ /* Disable NVRAM access. */ /* */ @@ -2326,7 +2287,6 @@ bce_disable_nvram_access(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_NVRAM); } - #ifdef BCE_NVRAM_WRITE_SUPPORT /****************************************************************************/ /* Erase NVRAM page before writing. */ @@ -2383,7 +2343,6 @@ bce_nvram_erase_page_exit: } #endif /* BCE_NVRAM_WRITE_SUPPORT */ - /****************************************************************************/ /* Read a dword (32 bits) from NVRAM. */ /* */ @@ -2447,7 +2406,6 @@ bce_nvram_read_dword(struct bce_softc *sc, return(rc); } - #ifdef BCE_NVRAM_WRITE_SUPPORT /****************************************************************************/ /* Write a dword (32 bits) to NVRAM. */ @@ -2507,7 +2465,6 @@ bce_nvram_write_dword(struct bce_softc *sc, u32 offset, u8 *val, } #endif /* BCE_NVRAM_WRITE_SUPPORT */ - /****************************************************************************/ /* Initialize NVRAM access. */ /* */ @@ -2571,7 +2528,6 @@ bce_init_nvram(struct bce_softc *sc) /* Look for the matching NVRAM device configuration data. */ for (j = 0, flash = &flash_table[0]; j < entry_count; j++, flash++) { - /* Check if the device matches any of the known devices. */ if ((val & mask) == (flash->strapping & mask)) { /* Found a device match. */ @@ -2621,7 +2577,6 @@ bce_init_nvram_get_flash_size: return rc; } - /****************************************************************************/ /* Read an arbitrary range of data from NVRAM. */ /* */ @@ -2745,7 +2700,6 @@ bce_nvram_read_exit: return rc; } - #ifdef BCE_NVRAM_WRITE_SUPPORT /****************************************************************************/ /* Write an arbitrary range of data from NVRAM. */ @@ -2872,7 +2826,6 @@ bce_nvram_write(struct bce_softc *sc, u32 offset, u8 *data_buf, if (!(sc->bce_flash_info->flags & BCE_NV_BUFFERED)) { for (addr = page_start; addr < data_start; addr += 4, i += 4) { - rc = bce_nvram_write_dword(sc, addr, &flash_buffer[i], cmd_flags); @@ -2888,7 +2841,6 @@ bce_nvram_write(struct bce_softc *sc, u32 offset, u8 *data_buf, if ((addr == page_end - 4) || ((sc->bce_flash_info->flags & BCE_NV_BUFFERED) && (addr == data_end - 4))) { - cmd_flags |= BCE_NVM_COMMAND_LAST; } rc = bce_nvram_write_dword(sc, addr, buf, @@ -2906,7 +2858,6 @@ bce_nvram_write(struct bce_softc *sc, u32 offset, u8 *data_buf, if (!(sc->bce_flash_info->flags & BCE_NV_BUFFERED)) { for (addr = data_end; addr < page_end; addr += 4, i += 4) { - if (addr == page_end-4) { cmd_flags = BCE_NVM_COMMAND_LAST; } @@ -2947,7 +2898,6 @@ bce_nvram_write_exit: } #endif /* BCE_NVRAM_WRITE_SUPPORT */ - /****************************************************************************/ /* Verifies that NVRAM is accessible and contains valid data. */ /* */ @@ -3023,7 +2973,6 @@ bce_nvram_test_exit: return rc; } - /****************************************************************************/ /* Calculates the size of the buffers to allocate based on the MTU. */ /* */ @@ -3152,7 +3101,6 @@ bce_get_media(struct bce_softc *sc) sc->bce_phy_flags |= BCE_PHY_SERDES_FLAG; if (sc->bce_phy_flags & BCE_PHY_SERDES_FLAG) { - sc->bce_flags |= BCE_NO_WOL_FLAG; if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) @@ -3181,7 +3129,6 @@ bce_get_media_exit: DBEXIT(BCE_VERBOSE_PHY); } - /****************************************************************************/ /* Performs PHY initialization required before MII drivers access the */ /* device. */ @@ -3213,7 +3160,6 @@ bce_init_media(struct bce_softc *sc) } } - /****************************************************************************/ /* Free any DMA memory owned by the driver. */ /* */ @@ -3251,7 +3197,6 @@ bce_dma_free(struct bce_softc *sc) sc->status_tag = NULL; } - /* Free, unmap, and destroy the statistics block. */ if (sc->stats_block_paddr != 0) { bus_dmamap_unload( @@ -3273,7 +3218,6 @@ bce_dma_free(struct bce_softc *sc) sc->stats_tag = NULL; } - /* Free, unmap and destroy all context memory pages. */ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) { for (i = 0; i < sc->ctx_pages; i++ ) { @@ -3300,7 +3244,6 @@ bce_dma_free(struct bce_softc *sc) } } - /* Free, unmap and destroy all TX buffer descriptor chain pages. */ for (i = 0; i < sc->tx_pages; i++ ) { if (sc->tx_bd_chain_paddr[i] != 0) { @@ -3325,7 +3268,6 @@ bce_dma_free(struct bce_softc *sc) sc->tx_bd_chain_tag = NULL; } - /* Free, unmap and destroy all RX buffer descriptor chain pages. */ for (i = 0; i < sc->rx_pages; i++ ) { if (sc->rx_bd_chain_paddr[i] != 0) { @@ -3350,7 +3292,6 @@ bce_dma_free(struct bce_softc *sc) sc->rx_bd_chain_tag = NULL; } - /* Free, unmap and destroy all page buffer descriptor chain pages. */ if (bce_hdr_split == TRUE) { for (i = 0; i < sc->pg_pages; i++ ) { @@ -3377,7 +3318,6 @@ bce_dma_free(struct bce_softc *sc) } } - /* Unload and destroy the TX mbuf maps. */ for (i = 0; i < MAX_TX_BD_AVAIL; i++) { if (sc->tx_mbuf_map[i] != NULL) { @@ -3440,7 +3380,6 @@ bce_dma_free(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_UNLOAD | BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Get DMA memory from the OS. */ /* */ @@ -3474,7 +3413,6 @@ bce_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) } } - /****************************************************************************/ /* Allocate any DMA memory needed by the driver. */ /* */ @@ -3626,7 +3564,6 @@ bce_dma_alloc(device_t dev) } for (i = 0; i < sc->ctx_pages; i++) { - if(bus_dmamem_alloc(sc->ctx_tag, (void **)&sc->ctx_block[i], BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, @@ -3670,7 +3607,6 @@ bce_dma_alloc(device_t dev) } for (i = 0; i < sc->tx_pages; i++) { - if(bus_dmamem_alloc(sc->tx_bd_chain_tag, (void **)&sc->tx_bd_chain[i], BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, @@ -3747,7 +3683,6 @@ bce_dma_alloc(device_t dev) } for (i = 0; i < sc->rx_pages; i++) { - if (bus_dmamem_alloc(sc->rx_bd_chain_tag, (void **)&sc->rx_bd_chain[i], BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, @@ -3881,7 +3816,6 @@ bce_dma_alloc_exit: return(rc); } - /****************************************************************************/ /* Release all resources used by the driver. */ /* */ @@ -3935,7 +3869,6 @@ bce_release_resources(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Firmware synchronization. */ /* */ @@ -3981,7 +3914,6 @@ bce_fw_sync(struct bce_softc *sc, u32 msg_data) /* If we've timed out, tell bootcode that we've stopped waiting. */ if (((val & BCE_FW_MSG_ACK) != (msg_data & BCE_DRV_MSG_SEQ)) && ((msg_data & BCE_DRV_MSG_DATA) != BCE_DRV_MSG_DATA_WAIT0)) { - BCE_PRINTF("%s(%d): Firmware synchronization timeout! " "msg_data = 0x%08X\n", __FILE__, __LINE__, msg_data); @@ -3999,7 +3931,6 @@ bce_fw_sync_exit: return (rc); } - /****************************************************************************/ /* Load Receive Virtual 2 Physical (RV2P) processor firmware. */ /* */ @@ -4047,7 +3978,6 @@ bce_load_rv2p_fw(struct bce_softc *sc, const u32 *rv2p_code, DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Load RISC processor firmware. */ /* */ @@ -4125,7 +4055,6 @@ bce_load_cpu_fw(struct bce_softc *sc, struct cpu_reg *cpu_reg, DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Starts the RISC processor. */ /* */ @@ -4150,7 +4079,6 @@ bce_start_cpu(struct bce_softc *sc, struct cpu_reg *cpu_reg) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Halts the RISC processor. */ /* */ @@ -4173,7 +4101,6 @@ bce_halt_cpu(struct bce_softc *sc, struct cpu_reg *cpu_reg) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the RX CPU. */ /* */ @@ -4206,7 +4133,6 @@ bce_start_rxp_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the RX CPU. */ /* */ @@ -4304,7 +4230,6 @@ bce_init_rxp_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the TX CPU. */ /* */ @@ -4401,7 +4326,6 @@ bce_init_txp_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the TPAT CPU. */ /* */ @@ -4498,7 +4422,6 @@ bce_init_tpat_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the CP CPU. */ /* */ @@ -4595,7 +4518,6 @@ bce_init_cp_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the COM CPU. */ /* */ @@ -4692,7 +4614,6 @@ bce_init_com_cpu(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the RV2P, RX, TX, TPAT, COM, and CP CPUs. */ /* */ @@ -4707,7 +4628,6 @@ bce_init_cpus(struct bce_softc *sc) DBENTER(BCE_VERBOSE_RESET); if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) { - if ((BCE_CHIP_REV(sc) == BCE_CHIP_REV_Ax)) { bce_load_rv2p_fw(sc, bce_xi90_rv2p_proc1, sizeof(bce_xi90_rv2p_proc1), RV2P_PROC1); @@ -4736,7 +4656,6 @@ bce_init_cpus(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize context memory. */ /* */ @@ -4809,7 +4728,6 @@ bce_init_ctx(struct bce_softc *sc) } } } else { - DBPRINT(sc, BCE_INFO, "Initializing 5706/5708 context.\n"); /* @@ -4820,7 +4738,6 @@ bce_init_ctx(struct bce_softc *sc) vcid_addr = GET_CID_ADDR(96); while (vcid_addr) { - vcid_addr -= PHY_CTX_SIZE; REG_WR(sc, BCE_CTX_VIRT_ADDR, 0); @@ -4833,14 +4750,12 @@ bce_init_ctx(struct bce_softc *sc) REG_WR(sc, BCE_CTX_VIRT_ADDR, vcid_addr); REG_WR(sc, BCE_CTX_PAGE_TBL, vcid_addr); } - } init_ctx_fail: DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_CTX); return (rc); } - /****************************************************************************/ /* Fetch the permanent MAC address of the controller. */ /* */ @@ -4883,7 +4798,6 @@ bce_get_mac_addr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Program the MAC address. */ /* */ @@ -4914,7 +4828,6 @@ bce_set_mac_addr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Stop the controller. */ /* */ @@ -4959,7 +4872,6 @@ bce_stop(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET); } - static int bce_reset(struct bce_softc *sc, u32 reset_code) { @@ -5082,7 +4994,6 @@ bce_reset_exit: return (rc); } - static int bce_chipinit(struct bce_softc *sc) { @@ -5183,7 +5094,6 @@ bce_chipinit_exit: return(rc); } - /****************************************************************************/ /* Initialize the controller in preparation to send/receive traffic. */ /* */ @@ -5353,7 +5263,6 @@ bce_blockinit_exit: return (rc); } - /****************************************************************************/ /* Encapsulate an mbuf into the rx_bd chain. */ /* */ @@ -5468,7 +5377,6 @@ bce_get_rx_buf_exit: return(rc); } - /****************************************************************************/ /* Encapsulate an mbuf cluster into the page chain. */ /* */ @@ -5572,7 +5480,6 @@ bce_get_pg_buf_exit: return(rc); } - /****************************************************************************/ /* Initialize the TX context memory. */ /* */ @@ -5622,7 +5529,6 @@ bce_init_tx_context(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_SEND | BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Allocate memory and initialize the TX data structures. */ /* */ @@ -5682,7 +5588,6 @@ bce_init_tx_chain(struct bce_softc *sc) return(rc); } - /****************************************************************************/ /* Free memory and clear the TX data structures. */ /* */ @@ -5724,7 +5629,6 @@ bce_free_tx_chain(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_SEND | BCE_VERBOSE_UNLOAD); } - /****************************************************************************/ /* Initialize the RX context memory. */ /* */ @@ -5798,7 +5702,6 @@ bce_init_rx_context(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_RECV | BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Allocate memory and initialize the RX data structures. */ /* */ @@ -5862,7 +5765,6 @@ bce_init_rx_chain(struct bce_softc *sc) return(rc); } - /****************************************************************************/ /* Add mbufs to the RX chain until its full or an mbuf allocation error */ /* occurs. */ @@ -5910,7 +5812,6 @@ bce_fill_rx_chain(struct bce_softc *sc) BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Free memory and clear the RX data structures. */ /* */ @@ -5953,7 +5854,6 @@ bce_free_rx_chain(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_RECV | BCE_VERBOSE_UNLOAD); } - /****************************************************************************/ /* Allocate memory and initialize the page data structures. */ /* Assumes that bce_init_rx_chain() has not already been called. */ @@ -6033,7 +5933,6 @@ bce_init_pg_chain(struct bce_softc *sc) return(rc); } - /****************************************************************************/ /* Add mbufs to the page chain until its full or an mbuf allocation error */ /* occurs. */ @@ -6080,7 +5979,6 @@ bce_fill_pg_chain(struct bce_softc *sc) BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Free memory and clear the RX data structures. */ /* */ @@ -6121,7 +6019,6 @@ bce_free_pg_chain(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_RESET | BCE_VERBOSE_RECV | BCE_VERBOSE_UNLOAD); } - static u32 bce_get_rphy_link(struct bce_softc *sc) { @@ -6170,7 +6067,6 @@ bce_get_rphy_link(struct bce_softc *sc) return (advertise); } - /****************************************************************************/ /* Set media options. */ /* */ @@ -6193,7 +6089,6 @@ bce_ifmedia_upd(struct ifnet *ifp) return (error); } - /****************************************************************************/ /* Set media options. */ /* */ @@ -6316,7 +6211,6 @@ bce_ifmedia_upd_locked(struct ifnet *ifp) return (error); } - static void bce_ifmedia_sts_rphy(struct bce_softc *sc, struct ifmediareq *ifmr) { @@ -6395,7 +6289,6 @@ bce_ifmedia_sts_rphy(struct bce_softc *sc, struct ifmediareq *ifmr) ifmr->ifm_active |= IFM_ETH_TXPAUSE; } - /****************************************************************************/ /* Reports current media status. */ /* */ @@ -6431,7 +6324,6 @@ bce_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) DBEXIT(BCE_VERBOSE_PHY); } - /****************************************************************************/ /* Handles PHY generated interrupt events. */ /* */ @@ -6454,7 +6346,6 @@ bce_phy_intr(struct bce_softc *sc) /* Handle any changes if the link state has changed. */ if (new_link_state != old_link_state) { - /* Update the status_attn_bits_ack field. */ if (new_link_state) { REG_WR(sc, BCE_PCICFG_STATUS_BIT_SET_CMD, @@ -6497,7 +6388,6 @@ bce_phy_intr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_PHY | BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Reads the receive consumer value from the status block (skipping over */ /* chain page pointer if necessary). */ @@ -6740,7 +6630,6 @@ bce_rx_intr(struct bce_softc *sc) if (status & (L2_FHDR_ERRORS_BAD_CRC | L2_FHDR_ERRORS_PHY_DECODE | L2_FHDR_ERRORS_ALIGNMENT | L2_FHDR_ERRORS_TOO_SHORT | L2_FHDR_ERRORS_GIANT_FRAME)) { - /* Log the error and release the mbuf. */ sc->l2fhdr_error_count++; m_freem(m0); @@ -6770,7 +6659,6 @@ bce_rx_intr(struct bce_softc *sc) /* Check for a valid TCP/UDP frame. */ if (status & (L2_FHDR_STATUS_TCP_SEGMENT | L2_FHDR_STATUS_UDP_DATAGRAM)) { - /* Check for a good TCP/UDP checksum. */ if ((status & (L2_FHDR_ERRORS_TCP_XSUM | L2_FHDR_ERRORS_UDP_XSUM)) == 0) { @@ -6870,7 +6758,6 @@ bce_rx_intr_next_rx: DBEXIT(BCE_VERBOSE_RECV | BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Reads the transmit consumer value from the status block (skipping over */ /* chain page pointer if necessary). */ @@ -6891,7 +6778,6 @@ bce_get_hw_tx_cons(struct bce_softc *sc) return hw_cons; } - /****************************************************************************/ /* Handles transmit completion interrupt events. */ /* */ @@ -6955,7 +6841,6 @@ bce_tx_intr(struct bce_softc *sc) * has an mbuf pointer and DMA map. */ if (sc->tx_mbuf_ptr[sw_tx_chain_cons] != NULL) { - /* Validate that this is the last tx_bd. */ DBRUNIF((!(txbd->tx_bd_flags & TX_BD_FLAGS_END)), BCE_PRINTF("%s(%d): tx_bd END flag not set but " @@ -7010,7 +6895,6 @@ bce_tx_intr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_SEND | BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Disables interrupt generation. */ /* */ @@ -7028,7 +6912,6 @@ bce_disable_intr(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Enables interrupt generation. */ /* */ @@ -7054,7 +6937,6 @@ bce_enable_intr(struct bce_softc *sc, int coal_now) DBEXIT(BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Handles controller initialization. */ /* */ @@ -7167,7 +7049,6 @@ bce_init_locked_exit: DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Initialize the controller just enough so that any management firmware */ /* running on the device will continue to operate correctly. */ @@ -7204,7 +7085,6 @@ bce_mgmt_init_locked_exit: DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Handles controller initialization when called from an unlocked routine. */ /* */ @@ -7225,7 +7105,6 @@ bce_init(void *xsc) DBEXIT(BCE_VERBOSE_RESET); } - /****************************************************************************/ /* Modifies an mbuf for TSO on the hardware. */ /* */ @@ -7342,7 +7221,6 @@ bce_tso_setup(struct bce_softc *sc, struct mbuf **m_head, u16 *flags) return (*m_head); } - /****************************************************************************/ /* Encapsultes an mbuf cluster into the tx_bd chain structure and makes the */ /* memory visible to the controller. */ @@ -7482,7 +7360,6 @@ bce_tx_encap(struct bce_softc *sc, struct mbuf **m_head) * the mbuf. */ for (i = 0; i < nsegs ; i++) { - chain_prod = TX_CHAIN_IDX(prod); txbd= &sc->tx_bd_chain[TX_PAGE(chain_prod)] [TX_IDX(chain_prod)]; @@ -7542,7 +7419,6 @@ bce_tx_encap_exit: return(rc); } - /****************************************************************************/ /* Main transmit routine when called from another routine with a lock. */ /* */ @@ -7587,7 +7463,6 @@ bce_start_locked(struct ifnet *ifp) * Keep adding entries while there is space in the ring. */ while (sc->used_tx_bd < sc->max_tx_bd) { - /* Check for any frames to send. */ IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); @@ -7637,7 +7512,6 @@ bce_start_locked_exit: DBEXIT(BCE_VERBOSE_SEND | BCE_VERBOSE_CTX); } - /****************************************************************************/ /* Main transmit routine when called from another routine without a lock. */ /* */ @@ -7658,7 +7532,6 @@ bce_start(struct ifnet *ifp) DBEXIT(BCE_VERBOSE_SEND); } - /****************************************************************************/ /* Handles any IOCTL calls from the operating system. */ /* */ @@ -7676,7 +7549,6 @@ bce_ioctl(struct ifnet *ifp, u_long command, caddr_t data) DBENTER(BCE_VERBOSE_MISC); switch(command) { - /* Set the interface MTU. */ case SIOCSIFMTU: /* Check that the MTU setting is supported. */ @@ -7823,7 +7695,6 @@ bce_ioctl(struct ifnet *ifp, u_long command, caddr_t data) return(error); } - /****************************************************************************/ /* Transmit timeout handler. */ /* */ @@ -7896,7 +7767,6 @@ bce_watchdog_exit: DBEXIT(BCE_EXTREME_SEND); } - /* * Interrupt handler. */ @@ -7956,7 +7826,6 @@ bce_intr(void *xsc) /* Keep processing data as long as there is work to do. */ for (;;) { - status_attn_bits = sc->status_block->status_attn_bits; DBRUNIF(DB_RANDOMTRUE(unexpected_attention_sim_control), @@ -7982,7 +7851,6 @@ bce_intr(void *xsc) if (((status_attn_bits & ~STATUS_ATTN_BITS_LINK_STATE) != (sc->status_block->status_attn_bits_ack & ~STATUS_ATTN_BITS_LINK_STATE))) { - sc->unexpected_attention_count++; BCE_PRINTF("%s(%d): Fatal attention detected: " @@ -8043,7 +7911,6 @@ bce_intr_exit: DBEXIT(BCE_VERBOSE_SEND | BCE_VERBOSE_RECV | BCE_VERBOSE_INTR); } - /****************************************************************************/ /* Programs the various packet receive modes (broadcast and multicast). */ /* */ @@ -8136,7 +8003,6 @@ bce_set_rx_mode(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_MISC); } - /****************************************************************************/ /* Called periodically to updates statistics from the controllers */ /* statistics block. */ @@ -8381,7 +8247,6 @@ bce_get_counter(struct ifnet *ifp, ift_counter cnt) } } - /****************************************************************************/ /* Periodic function to notify the bootcode that the driver is still */ /* present. */ @@ -8432,14 +8297,12 @@ bce_pulse(void *xsc) } } - /* Schedule the next pulse. */ callout_reset(&sc->bce_pulse_callout, hz, bce_pulse, sc); DBEXIT(BCE_EXTREME_MISC); } - /****************************************************************************/ /* Periodic function to perform maintenance tasks. */ /* */ @@ -8502,7 +8365,6 @@ bce_tick(void *xsc) (bce_verbose || bootverbose)) BCE_PRINTF("Gigabit link up!\n"); } - } if (sc->bce_link_up == TRUE) { /* Now that link is up, handle any outstanding TX traffic. */ @@ -8546,7 +8408,6 @@ bce_fw_cap_init(struct bce_softc *sc) bce_shmem_wr(sc, BCE_DRV_ACK_CAP_MB, ack); } - #ifdef BCE_DEBUG /****************************************************************************/ /* Allows the driver state to be dumped through the sysctl interface. */ @@ -8575,7 +8436,6 @@ bce_sysctl_driver_state(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Allows the hardware state to be dumped through the sysctl interface. */ /* */ @@ -8603,7 +8463,6 @@ bce_sysctl_hw_state(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Allows the status block to be dumped through the sysctl interface. */ /* */ @@ -8631,7 +8490,6 @@ bce_sysctl_status_block(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Allows the stats block to be dumped through the sysctl interface. */ /* */ @@ -8659,7 +8517,6 @@ bce_sysctl_stats_block(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Allows the stat counters to be cleared without unloading/reloading the */ /* driver. */ @@ -8723,7 +8580,6 @@ bce_sysctl_stats_clear(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Allows the shared memory contents to be dumped through the sysctl . */ /* interface. */ @@ -8752,7 +8608,6 @@ bce_sysctl_shmem_state(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Allows the bootcode state to be dumped through the sysctl interface. */ /* */ @@ -8780,7 +8635,6 @@ bce_sysctl_bc_state(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Provides a sysctl interface to allow dumping the RX BD chain. */ /* */ @@ -8808,7 +8662,6 @@ bce_sysctl_dump_rx_bd_chain(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Provides a sysctl interface to allow dumping the RX MBUF chain. */ /* */ @@ -8836,7 +8689,6 @@ bce_sysctl_dump_rx_mbuf_chain(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Provides a sysctl interface to allow dumping the TX chain. */ /* */ @@ -8864,7 +8716,6 @@ bce_sysctl_dump_tx_chain(SYSCTL_HANDLER_ARGS) return error; } - /****************************************************************************/ /* Provides a sysctl interface to allow dumping the page chain. */ /* */ @@ -8920,7 +8771,6 @@ bce_sysctl_nvram_read(SYSCTL_HANDLER_ARGS) return (error); } - /****************************************************************************/ /* Provides a sysctl interface to allow reading arbitrary registers in the */ /* device. DO NOT ENABLE ON PRODUCTION SYSTEMS! */ @@ -8952,7 +8802,6 @@ bce_sysctl_reg_read(SYSCTL_HANDLER_ARGS) return (error); } - /****************************************************************************/ /* Provides a sysctl interface to allow reading arbitrary PHY registers in */ /* the device. DO NOT ENABLE ON PRODUCTION SYSTEMS! */ @@ -8983,7 +8832,6 @@ bce_sysctl_phy_read(SYSCTL_HANDLER_ARGS) return (error); } - /****************************************************************************/ /* Provides a sysctl interface for dumping the nvram contents. */ /* DO NOT ENABLE ON PRODUCTION SYSTEMS! */ @@ -9041,12 +8889,10 @@ bce_sysctl_nvram_write(SYSCTL_HANDLER_ARGS) error = bce_nvram_write(sc, 0, sc->nvram_buf, sc->bce_flash_size); - return error; } #endif - /****************************************************************************/ /* Provides a sysctl interface to allow reading a CID. */ /* */ @@ -9073,7 +8919,6 @@ bce_sysctl_dump_ctx(SYSCTL_HANDLER_ARGS) return (error); } - /****************************************************************************/ /* Provides a sysctl interface to forcing the driver to dump state and */ /* enter the debugger. DO NOT ENABLE ON PRODUCTION SYSTEMS! */ @@ -9662,7 +9507,6 @@ bce_add_sysctls(struct bce_softc *sc) DBEXIT(BCE_VERBOSE_MISC); } - /****************************************************************************/ /* BCE Debug Routines */ /****************************************************************************/ @@ -9683,7 +9527,6 @@ bce_freeze_controller(struct bce_softc *sc) REG_WR(sc, BCE_MISC_COMMAND, val); } - /****************************************************************************/ /* Unfreezes the controller after a freeze operation. This may not always */ /* work and the controller will require a reset! */ @@ -9700,7 +9543,6 @@ bce_unfreeze_controller(struct bce_softc *sc) REG_WR(sc, BCE_MISC_COMMAND, val); } - /****************************************************************************/ /* Prints out Ethernet frame information from an mbuf. */ /* */ @@ -9805,7 +9647,6 @@ bce_dump_enet(struct bce_softc *sc, struct mbuf *m) "-----------------------------\n"); } - /****************************************************************************/ /* Prints out information about an mbuf. */ /* */ @@ -9867,7 +9708,6 @@ bce_dump_mbuf(struct bce_softc *sc, struct mbuf *m) } } - /****************************************************************************/ /* Prints out the mbufs in the TX mbuf chain. */ /* */ @@ -9897,7 +9737,6 @@ bce_dump_tx_mbuf_chain(struct bce_softc *sc, u16 chain_prod, int count) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the mbufs in the RX mbuf chain. */ /* */ @@ -9921,14 +9760,12 @@ bce_dump_rx_mbuf_chain(struct bce_softc *sc, u16 chain_prod, int count) chain_prod = RX_CHAIN_IDX(NEXT_RX_BD(chain_prod)); } - BCE_PRINTF( "----------------------------" "----------------" "----------------------------\n"); } - /****************************************************************************/ /* Prints out the mbufs in the mbuf page chain. */ /* */ @@ -9952,14 +9789,12 @@ bce_dump_pg_mbuf_chain(struct bce_softc *sc, u16 chain_prod, int count) chain_prod = PG_CHAIN_IDX(NEXT_PG_BD(chain_prod)); } - BCE_PRINTF( "----------------------------" "----------------" "----------------------------\n"); } - /****************************************************************************/ /* Prints out a tx_bd structure. */ /* */ @@ -10074,7 +9909,6 @@ bce_dump_txbd(struct bce_softc *sc, int idx, struct tx_bd *txbd) } } - /****************************************************************************/ /* Prints out a rx_bd structure. */ /* */ @@ -10100,7 +9934,6 @@ bce_dump_rxbd(struct bce_softc *sc, int idx, struct rx_bd *rxbd) rxbd->rx_bd_flags); } - /****************************************************************************/ /* Prints out a rx_bd structure in the page chain. */ /* */ @@ -10125,7 +9958,6 @@ bce_dump_pgbd(struct bce_softc *sc, int idx, struct rx_bd *pgbd) pgbd->rx_bd_len, pgbd->rx_bd_flags); } - /****************************************************************************/ /* Prints out a l2_fhdr structure. */ /* */ @@ -10143,7 +9975,6 @@ bce_dump_l2fhdr(struct bce_softc *sc, int idx, struct l2_fhdr *l2fhdr) l2fhdr->l2_fhdr_ip_xsum, l2fhdr->l2_fhdr_tcp_udp_xsum); } - /****************************************************************************/ /* Prints out context memory info. (Only useful for CID 0 to 16.) */ /* */ @@ -10258,14 +10089,12 @@ bce_dump_ctx(struct bce_softc *sc, u16 cid) CTX_RD(sc, GET_CID_ADDR(cid), i + 0xc)); } - BCE_PRINTF( "----------------------------" "----------------" "----------------------------\n"); } - /****************************************************************************/ /* Prints out the FTQ data. */ /* */ @@ -10511,7 +10340,6 @@ bce_dump_ftqs(struct bce_softc *sc) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the TX chain. */ /* */ @@ -10553,7 +10381,6 @@ bce_dump_tx_chain(struct bce_softc *sc, u16 tx_prod, int count) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the RX chain. */ /* */ @@ -10597,7 +10424,6 @@ bce_dump_rx_bd_chain(struct bce_softc *sc, u16 rx_prod, int count) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the page chain. */ /* */ @@ -10641,7 +10467,6 @@ bce_dump_pg_chain(struct bce_softc *sc, u16 pg_prod, int count) "----------------------------\n"); } - #define BCE_PRINT_RX_CONS(arg) \ if (sblk->status_rx_quick_consumer_index##arg) \ BCE_PRINTF("0x%04X(0x%04X) - rx_quick_consumer_index%d\n", \ @@ -10649,7 +10474,6 @@ if (sblk->status_rx_quick_consumer_index##arg) \ RX_CHAIN_IDX(sblk->status_rx_quick_consumer_index##arg), \ arg); - #define BCE_PRINT_TX_CONS(arg) \ if (sblk->status_tx_quick_consumer_index##arg) \ BCE_PRINTF("0x%04X(0x%04X) - tx_quick_consumer_index%d\n", \ @@ -10710,7 +10534,6 @@ bce_dump_status_block(struct bce_softc *sc) "----------------------------\n"); } - #define BCE_PRINT_64BIT_STAT(arg) \ if (sblk->arg##_lo || sblk->arg##_hi) \ BCE_PRINTF("0x%08X:%08X : %s\n", sblk->arg##_hi, \ @@ -10803,7 +10626,6 @@ bce_dump_stats_block(struct bce_softc *sc) "----------------------------\n"); } - /****************************************************************************/ /* Prints out a summary of the driver state. */ /* */ @@ -10961,7 +10783,6 @@ bce_dump_driver_state(struct bce_softc *sc) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the hardware state through a summary of important register, */ /* followed by a complete register dump. */ @@ -11073,7 +10894,6 @@ bce_dump_hw_state(struct bce_softc *sc) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the contentst of shared memory which is used for host driver */ /* to bootcode firmware communication. */ @@ -11111,7 +10931,6 @@ bce_dump_shmem_state(struct bce_softc *sc) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the mailbox queue registers. */ /* */ @@ -11143,7 +10962,6 @@ bce_dump_mq_regs(struct bce_softc *sc) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the bootcode state. */ /* */ @@ -11184,7 +11002,6 @@ bce_dump_bc_state(struct bce_softc *sc) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the TXP processor state. */ /* */ @@ -11243,7 +11060,6 @@ bce_dump_txp_state(struct bce_softc *sc, int regs) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the RXP processor state. */ /* */ @@ -11303,7 +11119,6 @@ bce_dump_rxp_state(struct bce_softc *sc, int regs) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the TPAT processor state. */ /* */ @@ -11363,7 +11178,6 @@ bce_dump_tpat_state(struct bce_softc *sc, int regs) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the Command Procesor (CP) state. */ /* */ @@ -11423,7 +11237,6 @@ bce_dump_cp_state(struct bce_softc *sc, int regs) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the Completion Procesor (COM) state. */ /* */ @@ -11481,7 +11294,6 @@ bce_dump_com_state(struct bce_softc *sc, int regs) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the Receive Virtual 2 Physical (RV2P) state. */ /* */ @@ -11549,7 +11361,6 @@ bce_dump_rv2p_state(struct bce_softc *sc) "----------------------------\n"); } - /****************************************************************************/ /* Prints out the driver state and then enters the debugger. */ /* */ diff --git a/sys/dev/bce/if_bcefw.h b/sys/dev/bce/if_bcefw.h index 4ba86701418..839df2762c5 100644 --- a/sys/dev/bce/if_bcefw.h +++ b/sys/dev/bce/if_bcefw.h @@ -1256,7 +1256,6 @@ const u32 bce_COM_b06FwBss[(0xc4/4) + 1] = { 0x0 }; const u32 bce_COM_b06FwSbss[(0x38/4) + 1] = { 0x0 }; const u32 bce_COM_b06FwSdata[(0x0/4) + 1] = { 0x0 }; - int bce_RXP_b06FwReleaseMajor = 0x6; int bce_RXP_b06FwReleaseMinor = 0x0; int bce_RXP_b06FwReleaseFix = 0xf; @@ -3122,7 +3121,6 @@ const u32 bce_RXP_b06FwBss[(0x440/4) + 1] = { 0x0 }; const u32 bce_RXP_b06FwSbss[(0x4c/4) + 1] = { 0x0 }; const u32 bce_RXP_b06FwSdata[(0x0/4) + 1] = { 0x0 }; - int bce_TPAT_b06FwReleaseMajor = 0x6; int bce_TPAT_b06FwReleaseMinor = 0x0; int bce_TPAT_b06FwReleaseFix = 0xf; @@ -3528,7 +3526,6 @@ const u32 bce_TPAT_b06FwBss[(0x450/4) + 1] = { 0x0 }; const u32 bce_TPAT_b06FwSbss[(0x44/4) + 1] = { 0x0 }; const u32 bce_TPAT_b06FwSdata[(0x0/4) + 1] = { 0x0 }; - int bce_TXP_b06FwReleaseMajor = 0x6; int bce_TXP_b06FwReleaseMinor = 0x0; int bce_TXP_b06FwReleaseFix = 0xf; @@ -4513,7 +4510,6 @@ const u32 bce_TXP_b06FwBss[(0x14c/4) + 1] = { 0x0 }; const u32 bce_TXP_b06FwSbss[(0x68/4) + 1] = { 0x0 }; const u32 bce_TXP_b06FwSdata[(0x0/4) + 1] = { 0x0 }; - int bce_CP_b06FwReleaseMajor = 0x6; int bce_CP_b06FwReleaseMinor = 0x0; int bce_CP_b06FwReleaseFix = 0xf; @@ -5953,7 +5949,6 @@ const u32 bce_CP_b06FwBss[(0x5d8/4) + 1] = { 0x0 }; const u32 bce_CP_b06FwSbss[(0xf1/4) + 1] = { 0x0 }; const u32 bce_CP_b06FwSdata[(0x0/4) + 1] = { 0x0 }; - const u32 bce_rv2p_proc1[] = { 0x00000010, 0xb1800006, 0x0000001f, 0x0106000f, @@ -6244,7 +6239,6 @@ const u32 bce_rv2p_proc1[] = { 0x00000018, 0x8000feed, }; - u32 bce_rv2p_proc2[] = { 0x00000010, 0xb1800004, 0x0000001f, 0x0106000f, @@ -6662,7 +6656,6 @@ u32 bce_rv2p_proc2[] = { 0x00000018, 0x8000fe68, }; - int bce_TXP_b09FwReleaseMajor = 0x6; int bce_TXP_b09FwReleaseMinor = 0x0; int bce_TXP_b09FwReleaseFix = 0x11; @@ -7669,7 +7662,6 @@ const u32 bce_TXP_b09FwBss[(0x24c/4) + 1] = { 0x0 }; const u32 bce_TXP_b09FwSbss[(0x64/4) + 1] = { 0x0 }; const u32 bce_TXP_b09FwSdata[(0x0/4) + 1] = { 0x0 }; - int bce_TPAT_b09FwReleaseMajor = 0x6; int bce_TPAT_b09FwReleaseMinor = 0x0; int bce_TPAT_b09FwReleaseFix = 0x11; @@ -7999,7 +7991,6 @@ const u32 bce_TPAT_b09FwBss[(0x12b4/4) + 1] = { 0x0 }; const u32 bce_TPAT_b09FwSbss[(0x3c/4) + 1] = { 0x0 }; const u32 bce_TPAT_b09FwSdata[(0x0/4) + 1] = { 0x0 }; - int bce_COM_b09FwReleaseMajor = 0x6; int bce_COM_b09FwReleaseMinor = 0x0; int bce_COM_b09FwReleaseFix = 0x11; @@ -9397,7 +9388,6 @@ const u32 bce_COM_b09FwBss[(0x11c/4) + 1] = { 0x0 }; const u32 bce_COM_b09FwSbss[(0x30/4) + 1] = { 0x0 }; const u32 bce_COM_b09FwSdata[(0x0/4) + 1] = { 0x0 }; - int bce_RXP_b09FwReleaseMajor = 0x6; int bce_RXP_b09FwReleaseMinor = 0x0; int bce_RXP_b09FwReleaseFix = 0x11; @@ -11788,7 +11778,6 @@ const u32 bce_RXP_b09FwBss[(0x1bc/4) + 1] = { 0x0 }; const u32 bce_RXP_b09FwSbss[(0x78/4) + 1] = { 0x0 }; const u32 bce_RXP_b09FwSdata[(0x0/4) + 1] = { 0x0 }; - int bce_CP_b09FwReleaseMajor = 0x6; int bce_CP_b09FwReleaseMinor = 0x0; int bce_CP_b09FwReleaseFix = 0x11; @@ -13247,7 +13236,6 @@ const u32 bce_CP_b09FwBss[(0x19c/4) + 1] = { 0x0 }; const u32 bce_CP_b09FwSbss[(0xa8/4) + 1] = { 0x0 }; const u32 bce_CP_b09FwSdata[(0x0/4) + 1] = { 0x0 }; - const u32 bce_xi_rv2p_proc1[] = { 0x00000010, 0xb1800006, 0x0000001f, 0x05060011, @@ -13538,7 +13526,6 @@ const u32 bce_xi_rv2p_proc1[] = { 0x00000018, 0x8000feed, }; - const u32 bce_xi_rv2p_proc2[] = { 0x00000010, 0xb1800004, 0x0000001f, 0x05060011, @@ -14007,7 +13994,6 @@ const u32 bce_xi_rv2p_proc2[] = { 0x00000018, 0x8000fe35, }; - const u32 bce_xi90_rv2p_proc1[] = { 0x00000010, 0xb1800006, 0x0000001f, 0x03060011, @@ -14313,7 +14299,6 @@ const u32 bce_xi90_rv2p_proc1[] = { 0x00000018, 0x8000fede, }; - const u32 bce_xi90_rv2p_proc2[] = { 0x00000010, 0xb1800004, 0x0000001f, 0x03060011, @@ -14831,7 +14816,6 @@ const u32 bce_xi90_rv2p_proc2[] = { 0x00000018, 0x8000fe04, }; - /* * The RV2P block must be configured for the system * page size, or more specifically, the number of diff --git a/sys/dev/bce/if_bcereg.h b/sys/dev/bce/if_bcereg.h index ad2db2666ba..ed63c44c6a8 100644 --- a/sys/dev/bce/if_bcereg.h +++ b/sys/dev/bce/if_bcereg.h @@ -489,7 +489,6 @@ default: DBPRINT(sc, BCE_INSANE_PHY, \ #endif /* BCE_DEBUG */ - /****************************************************************************/ /* Device identification definitions. */ /****************************************************************************/ @@ -542,7 +541,6 @@ default: DBPRINT(sc, BCE_INSANE_PHY, \ /* A serdes chip will have the first bit of the bond id set. */ #define BCE_CHIP_BOND_ID_SERDES_BIT 0x01 - /* shorthand one */ #define BCE_ASICREV(x) ((x) >> 28) #define BCE_ASICREV_BCM5700 0x06 @@ -639,7 +637,6 @@ struct flash_spec { const u8 *name; }; - /****************************************************************************/ /* Shared Memory layout */ /* The BCE bootcode will initialize this data area with port configurtion */ @@ -662,7 +659,6 @@ struct flash_spec { */ #define FW_ACK_TIME_OUT_MS 1000 - #define BCE_DRV_RESET_SIGNATURE 0x00000000 #define BCE_DRV_RESET_SIGNATURE_MAGIC 0x4841564b /* HAVK */ @@ -1042,7 +1038,6 @@ struct flash_spec { */ #define BCE_PCI_PCIX_CMD 0x42 - /****************************************************************************/ /* Convenience definitions. */ /****************************************************************************/ @@ -1093,7 +1088,6 @@ struct flash_spec { #define BCE_ADDR_HI(y) (0) #endif - /****************************************************************************/ /* Do not modify any of the following data structures, they are generated */ /* from RTL code. */ @@ -1124,7 +1118,6 @@ struct tx_bd { u16 tx_bd_vlan_tag; }; - /* * rx_bd definition */ @@ -1139,7 +1132,6 @@ struct rx_bd { #define RX_BD_FLAGS_START (1<<3) }; - /* * status_block definition */ @@ -1229,7 +1221,6 @@ struct status_block { #endif }; - /* * statistics_block definition */ @@ -1316,7 +1307,6 @@ struct statistics_block { u32 stat_GenStat15; }; - /* * l2_fhdr definition */ @@ -1392,7 +1382,6 @@ struct l2_fhdr { "\02RULE_b1" \ "\01RULE_b0" - /* * l2_tx_context definition (5706 and 5708) */ @@ -1439,7 +1428,6 @@ struct l2_fhdr { #define BCE_L2CTX_TX_TBDR_BHADDR_HI_XI 0x00000258 #define BCE_L2CTX_TX_TBDR_BHADDR_LO_XI 0x0000025c - /* * l2_rx_context definition (5706, 5708, 5709, and 5716) */ @@ -1482,7 +1470,6 @@ struct l2_fhdr { #define BCE_L2CTX_RX_NX_PG_BDHADDR_LO 0x00000054 #define BCE_L2CTX_RX_NX_PG_BDIDX 0x00000058 - /* * l2_mq definitions (5706, 5708, 5709, and 5716) */ @@ -1566,7 +1553,6 @@ struct l2_fhdr { #define BCE_PCICFG_MAILBOX_QUEUE_ADDR 0x00000090 #define BCE_PCICFG_MAILBOX_QUEUE_DATA 0x00000094 - /* * pci_reg definition * offset: 0x400 @@ -1748,7 +1734,6 @@ struct l2_fhdr { #define BCE_PCI_MSI_ADDR_H 0x00000454 #define BCE_PCI_MSI_ADDR_L 0x00000458 - /* * misc_reg definition * offset: 0x800 @@ -2784,7 +2769,6 @@ struct l2_fhdr { #define BCE_MISC_OSCFUNDS_CTRL_IAMP_ADJ_2 (2L<<10) #define BCE_MISC_OSCFUNDS_CTRL_IAMP_ADJ_3 (3L<<10) - /* * dma_reg definition * offset: 0xc00 @@ -2993,7 +2977,6 @@ struct l2_fhdr { #define BCE_DMA_FUSE_CTRL2_DATA 0x00000f14 - /* * context_reg definition * offset: 0x1000 @@ -3178,7 +3161,6 @@ struct l2_fhdr { #define BCE_CTX_CAM_CTRL_WRITE_REQ (1L<<30) #define BCE_CTX_CAM_CTRL_READ_REQ (1L<<31) - /* * emac_reg definition * offset: 0x1400 @@ -3673,7 +3655,6 @@ struct l2_fhdr { #define BCE_EMAC_TX_STAT_AC21 0x000016d4 #define BCE_EMAC_TXMAC_SUC_DBG_OVERRUNVEC 0x000016d8 - /* * rpm_reg definition * offset: 0x1800 @@ -4041,7 +4022,6 @@ struct l2_fhdr { #define BCE_RPM_ACPI_DBG_BUF_W32 0x000019f8 #define BCE_RPM_ACPI_DBG_BUF_W33 0x000019fc - /* * rlup_reg definition * offset: 0x2000 @@ -4051,7 +4031,6 @@ struct l2_fhdr { #define BCE_RLUP_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BCE_RLUP_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - /* * rv2pcsr_reg definition * offset: 0x2400 @@ -4061,7 +4040,6 @@ struct l2_fhdr { #define BCE_RV2PCSR_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BCE_RV2PCSR_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - /* * rdma_reg definition * offset: 0x2c00 @@ -4071,8 +4049,6 @@ struct l2_fhdr { #define BCE_RDMA_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BCE_RDMA_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - - /* * timer_reg definition * offset: 0x4400 @@ -4092,7 +4068,6 @@ struct l2_fhdr { #define BCE_TIMER_25MHZ_FREE_RUN 0x00004448 - /* * tsch_reg definition * offset: 0x4c00 @@ -4103,8 +4078,6 @@ struct l2_fhdr { #define BCE_TSCH_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BCE_TSCH_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - - /* * rbuf_reg definition * offset: 0x200000 @@ -4152,7 +4125,6 @@ struct l2_fhdr { #define BCE_RBUF_CLIST_DATA 0x00210000 #define BCE_RBUF_BUF_DATA 0x00220000 - /* * rv2p_reg definition * offset: 0x2800 @@ -4308,7 +4280,6 @@ struct l2_fhdr { #define BCE_RV2P_MFTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BCE_RV2P_MFTQ_CTL_CUR_DEPTH (0x3ffL<<22) - /* * mq_reg definition * offset: 0x3c00 @@ -4427,7 +4398,6 @@ struct l2_fhdr { #define BCE_MQ_MAP_L2_5_ENA (0x1L<<31) #define BCE_MQ_MAP_L2_5_DEFAULT 0x83000b08 - /* * csch_reg definition * offset: 0x4000 @@ -4438,7 +4408,6 @@ struct l2_fhdr { #define BCE_CSCH_CH_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BCE_CSCH_CH_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - /* * tbdr_reg definition * offset: 0x5000 @@ -4506,7 +4475,6 @@ struct l2_fhdr { #define BCE_TBDR_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BCE_TBDR_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - /* * tdma_reg definition * offset: 0x5c00 @@ -4596,7 +4564,6 @@ struct l2_fhdr { #define BCE_TDMA_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BCE_TDMA_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - /* * nvm_reg definition * offset: 0x6400 @@ -4701,7 +4668,6 @@ struct l2_fhdr { #define BCE_NVM_WRITE1_WRDI_CMD (0xffL<<8) #define BCE_NVM_WRITE1_SR_DATA (0xffL<<16) - /* * hc_reg definition * offset: 0x6800 @@ -5485,7 +5451,6 @@ struct l2_fhdr { #define BCE_HC_PERIODIC_TICKS_8_HC_PERIODIC_TICKS (0xffffL<<0) #define BCE_HC_PERIODIC_TICKS_8_HC_INT_PERIODIC_TICKS (0xffffL<<16) - /* * txp_reg definition * offset: 0x40000 @@ -5566,7 +5531,6 @@ struct l2_fhdr { #define BCE_TXP_SCRATCH 0x00060000 - /* * tpat_reg definition * offset: 0x80000 @@ -5646,7 +5610,6 @@ struct l2_fhdr { #define BCE_TPAT_SCRATCH 0x000a0000 - /* * rxp_reg definition * offset: 0xc0000 @@ -5748,7 +5711,6 @@ struct l2_fhdr { #define BCE_RXP_SCRATCH 0x000e0000 - /* * com_reg definition * offset: 0x100000 @@ -5871,7 +5833,6 @@ struct l2_fhdr { #define BCE_COM_SCRATCH 0x00120000 - /* * cp_reg definition * offset: 0x180000 @@ -5952,7 +5913,6 @@ struct l2_fhdr { #define BCE_CP_SCRATCH 0x001a0000 - /* * tas_reg definition * offset: 0x1c0000 @@ -5962,7 +5922,6 @@ struct l2_fhdr { #define BCE_TAS_FTQ_CTL_MAX_DEPTH (0x3ffL<<12) #define BCE_TAS_FTQ_CTL_CUR_DEPTH (0x3ffL<<22) - /* * mcp_reg definition * offset: 0x140000