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Add endianess kludge code, so that bitfields work on the sparc64 as well.
Bad GCC, no cookies...
This commit is contained in:
Søren Schmidt
parent
99bb242b53
commit
e8a0928f7e
2 changed files with 150 additions and 18 deletions
156
sys/sys/ata.h
156
sys/sys/ata.h
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@ -33,31 +33,58 @@
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#include <sys/ioccom.h>
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/* ATA/ATAPI device parameter information */
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struct ata_params {
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/*000*/ u_int16_t packet_size :2; /* packet command size */
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#define ATAPI_PSIZE_12 0 /* 12 bytes */
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#define ATAPI_PSIZE_16 1 /* 16 bytes */
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u_int16_t incomplete :1;
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u_int16_t :2;
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u_int16_t drq_type :2; /* DRQ type */
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#define ATAPI_DRQT_MPROC 0 /* cpu 3 ms delay */
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#define ATAPI_DRQT_INTR 1 /* intr 10 ms delay */
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#define ATAPI_DRQT_ACCEL 2 /* accel 50 us delay */
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u_int16_t removable :1; /* device is removable */
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u_int16_t type :5; /* device type */
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#define ATAPI_TYPE_DIRECT 0 /* disk/floppy */
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#define ATAPI_TYPE_TAPE 1 /* streaming tape */
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#define ATAPI_TYPE_CDROM 5 /* CD-ROM device */
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#define ATAPI_TYPE_OPTICAL 7 /* optical disk */
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u_int16_t :2;
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u_int16_t cmd_protocol :1; /* command protocol */
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#define ATA_PROTO_ATA 0
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#define ATA_PROTO_ATAPI 1
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#define ATA_BT_SINGLEPORTSECTOR 1 /* 1 port, 1 sector buffer */
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#define ATA_BT_DUALPORTMULTI 2 /* 2 port, mult sector buffer */
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#define ATA_BT_DUALPORTMULTICACHE 3 /* above plus track cache */
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#define ATA_FLAG_54_58 1 /* words 54-58 valid */
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#define ATA_FLAG_64_70 2 /* words 64-70 valid */
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#define ATA_FLAG_88 4 /* word 88 valid */
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/* ATA/ATAPI device parameter information */
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struct ata_params {
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#if BYTE_ORDER == LITTLE_ENDIAN
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/*000*/ u_int16_t packet_size :2; /* packet command size */
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u_int16_t incomplete :1;
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u_int16_t :2;
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u_int16_t drq_type :2; /* DRQ type */
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u_int16_t removable :1; /* device is removable */
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u_int16_t type :5; /* device type */
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u_int16_t :2;
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u_int16_t cmd_protocol :1; /* command protocol */
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#else
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u_int16_t cmd_protocol :1; /* command protocol */
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u_int16_t :2;
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u_int16_t type :5; /* device type */
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u_int16_t removable :1; /* device is removable */
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u_int16_t drq_type :2; /* DRQ type */
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u_int16_t :2;
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u_int16_t incomplete :1;
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u_int16_t packet_size :2; /* packet command size */
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#endif
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/*001*/ u_int16_t cylinders; /* # of cylinders */
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u_int16_t reserved2;
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/*003*/ u_int16_t heads; /* # heads */
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@ -71,10 +98,18 @@ struct ata_params {
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u_int16_t obsolete22;
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/*023*/ u_int8_t revision[8]; /* firmware revision */
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/*027*/ u_int8_t model[40]; /* model name */
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#if BYTE_ORDER == LITTLE_ENDIAN
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/*047*/ u_int16_t sectors_intr:8; /* sectors per interrupt */
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u_int16_t :8;
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#else
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u_int16_t :8;
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u_int16_t sectors_intr:8; /* sectors per interrupt */
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#endif
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/*048*/ u_int16_t usedmovsd; /* double word read/write? */
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#if BYTE_ORDER == LITTLE_ENDIAN
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/*049*/ u_int16_t retired49:8;
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u_int16_t support_dma :1; /* DMA supported */
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u_int16_t support_lba :1; /* LBA supported */
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@ -94,17 +129,44 @@ struct ata_params {
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u_int16_t retired_piomode:8; /* PIO modes 0-2 */
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/*052*/ u_int16_t vendor52:8;
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u_int16_t retired_dmamode:8; /* DMA modes, not ATA-3 */
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#else
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u_int16_t support_idma :1; /* interleaved DMA supported */
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u_int16_t support_queueing:1; /* supports queuing overlap */
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u_int16_t stdby_ovlap :1; /* standby/overlap supported */
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u_int16_t softreset :1; /* needs softreset when busy */
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u_int16_t support_iordy :1; /* IORDY supported */
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u_int16_t disable_iordy :1; /* IORDY may be disabled */
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u_int16_t support_lba :1; /* LBA supported */
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u_int16_t support_dma :1; /* DMA supported */
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u_int16_t retired49:8;
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u_int16_t capability_zero:1;
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u_int16_t capability_one:1;
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u_int16_t :13;
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u_int16_t device_stdby_min:1;
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u_int16_t retired_piomode:8; /* PIO modes 0-2 */
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u_int16_t vendor51:8;
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u_int16_t retired_dmamode:8; /* DMA modes, not ATA-3 */
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u_int16_t vendor52:8;
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#endif
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/*053*/ u_int16_t atavalid; /* fields valid */
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#define ATA_FLAG_54_58 1 /* words 54-58 valid */
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#define ATA_FLAG_64_70 2 /* words 64-70 valid */
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#define ATA_FLAG_88 4 /* word 88 valid */
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u_int16_t obsolete54[5];
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#if BYTE_ORDER == LITTLE_ENDIAN
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/*059*/ u_int16_t multi_count:8;
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u_int16_t multi_valid:1;
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u_int16_t :7;
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#else
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u_int16_t :7;
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u_int16_t multi_valid:1;
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u_int16_t multi_count:8;
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#endif
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/*060*/ u_int32_t lba_size;
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/*060*/ u_int16_t lba_size_lo;
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u_int16_t lba_size_hi;
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u_int16_t obsolete62;
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/*063*/ u_int16_t mwdmamodes; /* multiword DMA modes */
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/*064*/ u_int16_t apiomodes; /* advanced PIO modes */
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@ -120,8 +182,13 @@ struct ata_params {
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u_int16_t reserved73;
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u_int16_t reserved74;
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#if BYTE_ORDER == LITTLE_ENDIAN
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/*075*/ u_int16_t queuelen:5;
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u_int16_t :11;
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#else
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u_int16_t :11;
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u_int16_t queuelen:5;
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#endif
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u_int16_t reserved76;
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u_int16_t reserved77;
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@ -130,6 +197,7 @@ struct ata_params {
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/*080*/ u_int16_t version_major;
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/*081*/ u_int16_t version_minor;
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struct {
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#if BYTE_ORDER == LITTLE_ENDIAN
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/*082/085*/ u_int16_t smart:1;
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u_int16_t security:1;
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u_int16_t removable:1;
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@ -173,6 +241,51 @@ struct ata_params {
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u_int16_t :8;
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u_int16_t extended_one:1;
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u_int16_t extended_zero:1;
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#else
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u_int16_t :1;
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u_int16_t nop:1;
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u_int16_t read_buffer:1;
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u_int16_t write_buffer:1;
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u_int16_t :1;
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u_int16_t protected:1;
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u_int16_t reset:1;
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u_int16_t service_irq:1;
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u_int16_t release_irq:1;
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u_int16_t look_ahead:1;
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u_int16_t write_cache:1;
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u_int16_t packet:1;
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u_int16_t power_mngt:1;
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u_int16_t removable:1;
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u_int16_t security:1;
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u_int16_t smart:1;
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u_int16_t support_zero:1;
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u_int16_t support_one:1;
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u_int16_t flush_cache48:1;
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u_int16_t flush_cache:1;
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u_int16_t config_overlay:1;
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u_int16_t address48:1;
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u_int16_t auto_acoustic:1;
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u_int16_t max_security:1;
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u_int16_t :1;
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u_int16_t spinup:1;
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u_int16_t standby:1;
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u_int16_t notify:1;
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u_int16_t apm:1;
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u_int16_t cfa:1;
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u_int16_t queued:1;
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u_int16_t microcode:1;
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u_int16_t extended_zero:1;
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u_int16_t extended_one:1;
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u_int16_t :8;
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u_int16_t logging:1;
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u_int16_t streaming:1;
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u_int16_t media_card_pass:1;
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u_int16_t media_serial_no:1;
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u_int16_t smart_self_test:1;
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u_int16_t smart_error_log:1;
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#endif
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} support, enabled;
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/*088*/ u_int16_t udmamodes; /* UltraDMA modes */
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@ -181,6 +294,7 @@ struct ata_params {
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/*091*/ u_int16_t apm_value;
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/*092*/ u_int16_t master_passwd_revision;
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#if BYTE_ORDER == LITTLE_ENDIAN
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/*093*/ u_int16_t hwres_master :8;
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u_int16_t hwres_slave :5;
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u_int16_t hwres_cblid :1;
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@ -188,12 +302,24 @@ struct ata_params {
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/*094*/ u_int16_t current_acoustic:8;
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u_int16_t vendor_acoustic:8;
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#else
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u_int16_t hwres_valid:2;
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u_int16_t hwres_cblid :1;
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u_int16_t hwres_slave :5;
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u_int16_t hwres_master :8;
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u_int16_t vendor_acoustic:8;
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u_int16_t current_acoustic:8;
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#endif
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/*095*/ u_int16_t stream_min_req_size;
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/*096*/ u_int16_t stream_transfer_time;
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/*097*/ u_int16_t stream_access_latency;
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/*098*/ u_int32_t stream_granularity;
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/*100*/ u_int64_t lba_size48;
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/*100*/ u_int16_t lba_size48_1;
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u_int16_t lba_size48_2;
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u_int16_t lba_size48_3;
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u_int16_t lba_size48_4;
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u_int16_t reserved104[23];
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/*127*/ u_int16_t removable_status;
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/*128*/ u_int16_t security_status;
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@ -43,9 +43,15 @@ union msf_lba {
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};
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struct cd_toc_entry {
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u_int :8;
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u_int control:4;
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u_int addr_type:4;
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#if BYTE_ORDER == LITTLE_ENDIAN
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u_int16_t :8;
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u_int16_t control:4;
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u_int16_t addr_type:4;
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#else
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u_int16_t :8;
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u_int16_t addr_type:4;
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u_int16_t control:4;
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#endif
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u_char track;
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u_int :8;
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union msf_lba addr;
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