From e3f95afdec4b9aa236ec5169125ab9cd143e9f49 Mon Sep 17 00:00:00 2001 From: Michal Meloun Date: Tue, 2 Feb 2016 14:53:34 +0000 Subject: [PATCH] ARM: All remaining functions in cpufunc_asm_arm10.S are identical with functions in cpufunc_asm_arm9.S. Use arm9 variants and remove cpufunc_asm_arm10.S completly. --- sys/arm/arm/cpufunc.c | 8 ++-- sys/arm/arm/cpufunc_asm_arm10.S | 71 --------------------------------- sys/arm/include/cpufunc.h | 12 ++---- sys/conf/Makefile.arm | 1 - sys/conf/files.arm | 3 +- 5 files changed, 9 insertions(+), 86 deletions(-) delete mode 100644 sys/arm/arm/cpufunc_asm_arm10.S diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c index 422a1a5d3af..514a6b1a405 100644 --- a/sys/arm/arm/cpufunc.c +++ b/sys/arm/arm/cpufunc.c @@ -167,7 +167,7 @@ struct cpu_functions armv5_ec_cpufuncs = { /* TLB functions */ armv4_tlb_flushID, /* tlb_flushID */ - arm10_tlb_flushID_SE, /* tlb_flushID_SE */ + arm9_tlb_flushID_SE, /* tlb_flushID_SE */ armv4_tlb_flushD, /* tlb_flushD */ armv4_tlb_flushD_SE, /* tlb_flushD_SE */ @@ -199,7 +199,7 @@ struct cpu_functions armv5_ec_cpufuncs = { /* Soft functions */ - arm10_context_switch, /* context_switch */ + arm9_context_switch, /* context_switch */ arm10_setup /* cpu setup */ @@ -218,7 +218,7 @@ struct cpu_functions sheeva_cpufuncs = { /* TLB functions */ armv4_tlb_flushID, /* tlb_flushID */ - arm10_tlb_flushID_SE, /* tlb_flushID_SE */ + arm9_tlb_flushID_SE, /* tlb_flushID_SE */ armv4_tlb_flushD, /* tlb_flushD */ armv4_tlb_flushD_SE, /* tlb_flushD_SE */ @@ -250,7 +250,7 @@ struct cpu_functions sheeva_cpufuncs = { /* Soft functions */ - arm10_context_switch, /* context_switch */ + arm9_context_switch, /* context_switch */ arm10_setup /* cpu setup */ }; diff --git a/sys/arm/arm/cpufunc_asm_arm10.S b/sys/arm/arm/cpufunc_asm_arm10.S deleted file mode 100644 index 21bc59786a8..00000000000 --- a/sys/arm/arm/cpufunc_asm_arm10.S +++ /dev/null @@ -1,71 +0,0 @@ -/* $NetBSD: cpufunc_asm_arm10.S,v 1.1 2003/09/06 09:12:29 rearnsha Exp $ */ - -/*- - * Copyright (c) 2002 ARM Limited - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the company may not be used to endorse or promote - * products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * ARM10 assembly functions for CPU / MMU / TLB specific operations - * - */ - -#include -__FBSDID("$FreeBSD$"); - -/* - * TLB functions - */ -ENTRY(arm10_tlb_flushID_SE) - mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */ - mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */ - bx lr -END(arm10_tlb_flushID_SE) - - -/* - * Context switch. - * - * These is the CPU-specific parts of the context switcher cpu_switch() - * These functions actually perform the TTB reload. - * - * NOTE: Special calling convention - * r1, r4-r13 must be preserved - */ -ENTRY(arm10_context_switch) - /* - * We can assume that the caches will only contain kernel addresses - * at this point. So no need to flush them again. - */ - mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */ - mcr p15, 0, r0, c2, c0, 0 /* set the new TTB */ - mcr p15, 0, r0, c8, c7, 0 /* and flush the I+D tlbs */ - - /* Paranoia -- make sure the pipeline is empty. */ - nop - nop - nop - bx lr -END(arm10_context_switch) diff --git a/sys/arm/include/cpufunc.h b/sys/arm/include/cpufunc.h index b56d1c20c9b..aad0febfa47 100644 --- a/sys/arm/include/cpufunc.h +++ b/sys/arm/include/cpufunc.h @@ -225,11 +225,13 @@ void fa526_idcache_wbinv_range(vm_offset_t start, vm_size_t end); #endif -#ifdef CPU_ARM9 +#if defined(CPU_ARM9) || defined(CPU_ARM9E) void arm9_setttb (u_int); - void arm9_tlb_flushID_SE (u_int va); +void arm9_context_switch (void); +#endif +#if defined(CPU_ARM9) void arm9_icache_sync_all (void); void arm9_icache_sync_range (vm_offset_t, vm_size_t); @@ -241,8 +243,6 @@ void arm9_dcache_wb_range (vm_offset_t, vm_size_t); void arm9_idcache_wbinv_all (void); void arm9_idcache_wbinv_range (vm_offset_t, vm_size_t); -void arm9_context_switch (void); - void arm9_setup (void); extern unsigned arm9_dcache_sets_max; @@ -252,10 +252,6 @@ extern unsigned arm9_dcache_index_inc; #endif #if defined(CPU_ARM9E) -void arm10_tlb_flushID_SE (u_int); - -void arm10_context_switch (void); - void arm10_setup (void); u_int sheeva_control_ext (u_int, u_int); diff --git a/sys/conf/Makefile.arm b/sys/conf/Makefile.arm index af5f7da3ec7..a7df55b5fe3 100644 --- a/sys/conf/Makefile.arm +++ b/sys/conf/Makefile.arm @@ -68,7 +68,6 @@ SYSTEM_LD_TAIL +=;sed s/" + SIZEOF_HEADERS"// ldscript.$M\ FILES_CPU_FUNC = \ $S/$M/$M/cpufunc_asm_arm9.S \ - $S/$M/$M/cpufunc_asm_arm10.S \ $S/$M/$M/cpufunc_asm_xscale.S $S/$M/$M/cpufunc_asm.S \ $S/$M/$M/cpufunc_asm_xscale_c3.S $S/$M/$M/cpufunc_asm_armv5_ec.S \ $S/$M/$M/cpufunc_asm_fa526.S $S/$M/$M/cpufunc_asm_sheeva.S \ diff --git a/sys/conf/files.arm b/sys/conf/files.arm index bf0e2626807..9f3a6bffedc 100644 --- a/sys/conf/files.arm +++ b/sys/conf/files.arm @@ -11,8 +11,7 @@ arm/arm/busdma_machdep-v6.c optional armv6 arm/arm/copystr.S standard arm/arm/cpufunc.c standard arm/arm/cpufunc_asm.S standard -arm/arm/cpufunc_asm_arm9.S optional cpu_arm9 -arm/arm/cpufunc_asm_arm10.S optional cpu_arm9e +arm/arm/cpufunc_asm_arm9.S optional cpu_arm9 | cpu_arm9e arm/arm/cpufunc_asm_arm11.S optional cpu_arm1176 arm/arm/cpufunc_asm_arm11x6.S optional cpu_arm1176 arm/arm/cpufunc_asm_armv4.S optional cpu_arm9 | cpu_arm9e | cpu_fa526 | cpu_xscale_80321 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | cpu_xscale_80219 | cpu_xscale_81342