Be a bit more discriminating when trying to decide when to screen out

certain PHY addresses in aue_miibus_readreg(). Not all adapters based
on the Pegasus chip may have their PHYs wired for the same MII bus
addresses: the logic that I used for my ADMtek eval board might not
apply to other adapters, so make sure to only use it if this is really
an ADMtek eval board (check the vendor/device ID).

This will hopefully make the LinkSys USB100TX adapter work correctly.
This commit is contained in:
Bill Paul 2000-01-08 06:52:36 +00:00
parent 1a24969d60
commit dd3e57dac6
2 changed files with 21 additions and 7 deletions

View file

@ -372,6 +372,8 @@ static int aue_miibus_readreg(dev, phy, reg)
int i;
u_int16_t val = 0;
sc = device_get_softc(dev);
/*
* The Am79C901 HomePNA PHY actually contains
* two transceivers: a 1Mbps HomePNA PHY and a
@ -382,13 +384,13 @@ static int aue_miibus_readreg(dev, phy, reg)
* happens to be configured for MII address 3,
* so we filter that out.
*/
if (phy == 3)
return(0);
if (phy != 1)
return(0);
sc = device_get_softc(dev);
if (sc->aue_info->aue_vid == USB_VENDOR_ADMTEK &&
sc->aue_info->aue_did == USB_PRODUCT_ADMTEK_PEGASUS) {
if (phy == 3)
return(0);
if (phy != 1)
return(0);
}
csr_write_1(sc, AUE_PHY_ADDR, phy);
csr_write_1(sc, AUE_PHY_CTL, reg|AUE_PHYCTL_READ);
@ -582,6 +584,7 @@ USB_ATTACH(aue)
usb_interface_descriptor_t *id;
usb_endpoint_descriptor_t *ed;
int i;
struct aue_type *t;
s = splimp();
@ -590,6 +593,16 @@ USB_ATTACH(aue)
sc->aue_udev = uaa->device;
sc->aue_unit = device_get_unit(self);
t = aue_devs;
while(t->aue_name != NULL) {
if (uaa->vendor == t->aue_vid &&
uaa->product == t->aue_did) {
sc->aue_info = t;
break;
}
t++;
}
id = usbd_get_interface_descriptor(uaa->iface);
usbd_devinfo(uaa->device, 0, devinfo);

View file

@ -237,6 +237,7 @@ struct aue_softc {
device_t aue_miibus;
usbd_device_handle aue_udev;
usbd_interface_handle aue_iface;
struct aue_type *aue_info;
int aue_ed[AUE_ENDPT_MAX];
usbd_pipe_handle aue_ep[AUE_ENDPT_MAX];
int aue_unit;