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arm: ti am335x ehrpwm remove sysctl interface
To minimize the maintenance time of this driver when new features are added the legacy sysctl interface has to go. Approved by: manu (mentor) Reviewed by: Dr. Rolf Jansen (freebsd-rj_obsigna.com) Differential revision: https://reviews.freebsd.org/D29546
This commit is contained in:
Oskar Holmlund
parent
5860696e69
commit
dbaf4b6539
1 changed files with 3 additions and 221 deletions
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@ -37,7 +37,6 @@ __FBSDID("$FreeBSD$");
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#include <sys/mutex.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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@ -53,17 +52,6 @@ __FBSDID("$FreeBSD$");
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* Enhanced resolution PWM driver. Many of the advanced featues of the hardware
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* are not supported by this driver. What is implemented here is simple
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* variable-duty-cycle PWM output.
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*
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* Note that this driver was historically configured using a set of sysctl
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* variables/procs, and later gained support for the PWM(9) API. The sysctl
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* code is still present to support existing apps, but that interface is
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* considered deprecated.
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*
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* An important caveat is that the original sysctl interface and the new PWM API
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* cannot both be used at once. If both interfaces are used to change
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* configuration, it's quite likely you won't get the expected results. Also,
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* reading the sysctl values after configuring via PWM will not return the right
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* results.
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******************************************************************************/
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/* In ticks */
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@ -160,8 +148,6 @@ static device_probe_t am335x_ehrpwm_probe;
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static device_attach_t am335x_ehrpwm_attach;
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static device_detach_t am335x_ehrpwm_detach;
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static int am335x_ehrpwm_clkdiv[8] = { 1, 2, 4, 8, 16, 32, 64, 128 };
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struct ehrpwm_channel {
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u_int duty; /* on duration, in ns */
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bool enabled; /* channel enabled? */
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@ -176,18 +162,6 @@ struct am335x_ehrpwm_softc {
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struct resource *sc_mem_res;
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int sc_mem_rid;
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/* Things used for configuration via sysctl [deprecated]. */
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int sc_pwm_clkdiv;
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int sc_pwm_freq;
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struct sysctl_oid *sc_clkdiv_oid;
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struct sysctl_oid *sc_freq_oid;
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struct sysctl_oid *sc_period_oid;
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struct sysctl_oid *sc_chanA_oid;
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struct sysctl_oid *sc_chanB_oid;
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uint32_t sc_pwm_period;
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uint32_t sc_pwm_dutyA;
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uint32_t sc_pwm_dutyB;
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/* Things used for configuration via pwm(9) api. */
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u_int sc_clkfreq; /* frequency in Hz */
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u_int sc_clktick; /* duration in ns */
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@ -311,167 +285,6 @@ am335x_ehrpwm_cfg_period(struct am335x_ehrpwm_softc *sc, u_int period)
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return (true);
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}
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static void
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am335x_ehrpwm_freq(struct am335x_ehrpwm_softc *sc)
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{
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int clkdiv;
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clkdiv = am335x_ehrpwm_clkdiv[sc->sc_pwm_clkdiv];
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sc->sc_pwm_freq = PWM_CLOCK / (1 * clkdiv) / sc->sc_pwm_period;
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}
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static int
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am335x_ehrpwm_sysctl_freq(SYSCTL_HANDLER_ARGS)
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{
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int clkdiv, error, freq, i, period;
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struct am335x_ehrpwm_softc *sc;
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uint32_t reg;
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sc = (struct am335x_ehrpwm_softc *)arg1;
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PWM_LOCK(sc);
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freq = sc->sc_pwm_freq;
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PWM_UNLOCK(sc);
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error = sysctl_handle_int(oidp, &freq, sizeof(freq), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (freq > PWM_CLOCK)
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freq = PWM_CLOCK;
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PWM_LOCK(sc);
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if (freq != sc->sc_pwm_freq) {
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for (i = nitems(am335x_ehrpwm_clkdiv) - 1; i >= 0; i--) {
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clkdiv = am335x_ehrpwm_clkdiv[i];
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period = PWM_CLOCK / clkdiv / freq;
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if (period > USHRT_MAX)
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break;
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sc->sc_pwm_clkdiv = i;
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sc->sc_pwm_period = period;
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}
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/* Reset the duty cycle settings. */
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sc->sc_pwm_dutyA = 0;
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sc->sc_pwm_dutyB = 0;
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EPWM_WRITE2(sc, EPWM_CMPA, sc->sc_pwm_dutyA);
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EPWM_WRITE2(sc, EPWM_CMPB, sc->sc_pwm_dutyB);
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/* Update the clkdiv settings. */
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reg = EPWM_READ2(sc, EPWM_TBCTL);
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reg &= ~TBCTL_CLKDIV_MASK;
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reg |= TBCTL_CLKDIV(sc->sc_pwm_clkdiv);
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EPWM_WRITE2(sc, EPWM_TBCTL, reg);
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/* Update the period settings. */
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EPWM_WRITE2(sc, EPWM_TBPRD, sc->sc_pwm_period - 1);
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am335x_ehrpwm_freq(sc);
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}
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PWM_UNLOCK(sc);
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return (0);
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}
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static int
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am335x_ehrpwm_sysctl_clkdiv(SYSCTL_HANDLER_ARGS)
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{
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int error, i, clkdiv;
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struct am335x_ehrpwm_softc *sc;
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uint32_t reg;
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sc = (struct am335x_ehrpwm_softc *)arg1;
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PWM_LOCK(sc);
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clkdiv = am335x_ehrpwm_clkdiv[sc->sc_pwm_clkdiv];
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PWM_UNLOCK(sc);
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error = sysctl_handle_int(oidp, &clkdiv, sizeof(clkdiv), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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PWM_LOCK(sc);
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if (clkdiv != am335x_ehrpwm_clkdiv[sc->sc_pwm_clkdiv]) {
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for (i = 0; i < nitems(am335x_ehrpwm_clkdiv); i++)
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if (clkdiv >= am335x_ehrpwm_clkdiv[i])
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sc->sc_pwm_clkdiv = i;
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reg = EPWM_READ2(sc, EPWM_TBCTL);
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reg &= ~TBCTL_CLKDIV_MASK;
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reg |= TBCTL_CLKDIV(sc->sc_pwm_clkdiv);
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EPWM_WRITE2(sc, EPWM_TBCTL, reg);
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am335x_ehrpwm_freq(sc);
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}
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PWM_UNLOCK(sc);
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return (0);
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}
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static int
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am335x_ehrpwm_sysctl_duty(SYSCTL_HANDLER_ARGS)
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{
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struct am335x_ehrpwm_softc *sc = (struct am335x_ehrpwm_softc*)arg1;
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int error;
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uint32_t duty;
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if (oidp == sc->sc_chanA_oid)
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duty = sc->sc_pwm_dutyA;
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else
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duty = sc->sc_pwm_dutyB;
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error = sysctl_handle_int(oidp, &duty, 0, req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (duty > sc->sc_pwm_period) {
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device_printf(sc->sc_dev, "Duty cycle can't be greater then period\n");
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return (EINVAL);
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}
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PWM_LOCK(sc);
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if (oidp == sc->sc_chanA_oid) {
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sc->sc_pwm_dutyA = duty;
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EPWM_WRITE2(sc, EPWM_CMPA, sc->sc_pwm_dutyA);
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}
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else {
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sc->sc_pwm_dutyB = duty;
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EPWM_WRITE2(sc, EPWM_CMPB, sc->sc_pwm_dutyB);
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}
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PWM_UNLOCK(sc);
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return (error);
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}
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static int
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am335x_ehrpwm_sysctl_period(SYSCTL_HANDLER_ARGS)
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{
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struct am335x_ehrpwm_softc *sc = (struct am335x_ehrpwm_softc*)arg1;
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int error;
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uint32_t period;
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period = sc->sc_pwm_period;
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error = sysctl_handle_int(oidp, &period, 0, req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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if (period < 1)
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return (EINVAL);
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if (period > USHRT_MAX)
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period = USHRT_MAX;
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PWM_LOCK(sc);
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/* Reset the duty cycle settings. */
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sc->sc_pwm_dutyA = 0;
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sc->sc_pwm_dutyB = 0;
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EPWM_WRITE2(sc, EPWM_CMPA, sc->sc_pwm_dutyA);
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EPWM_WRITE2(sc, EPWM_CMPB, sc->sc_pwm_dutyB);
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/* Update the period settings. */
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sc->sc_pwm_period = period;
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EPWM_WRITE2(sc, EPWM_TBPRD, period - 1);
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am335x_ehrpwm_freq(sc);
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PWM_UNLOCK(sc);
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return (error);
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}
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static int
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am335x_ehrpwm_channel_count(device_t dev, u_int *nchannel)
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{
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@ -568,8 +381,6 @@ am335x_ehrpwm_attach(device_t dev)
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{
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struct am335x_ehrpwm_softc *sc;
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uint32_t reg;
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid *tree;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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@ -583,43 +394,14 @@ am335x_ehrpwm_attach(device_t dev)
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goto fail;
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}
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/* Init sysctl interface */
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ctx = device_get_sysctl_ctx(sc->sc_dev);
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tree = device_get_sysctl_tree(sc->sc_dev);
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sc->sc_clkdiv_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"clkdiv", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
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am335x_ehrpwm_sysctl_clkdiv, "I", "PWM clock prescaler");
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sc->sc_freq_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"freq", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
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am335x_ehrpwm_sysctl_freq, "I", "PWM frequency");
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sc->sc_period_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"period", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
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am335x_ehrpwm_sysctl_period, "I", "PWM period");
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sc->sc_chanA_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"dutyA", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
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am335x_ehrpwm_sysctl_duty, "I", "Channel A duty cycles");
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sc->sc_chanB_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"dutyB", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
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am335x_ehrpwm_sysctl_duty, "I", "Channel B duty cycles");
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/* CONFIGURE EPWM1 */
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reg = EPWM_READ2(sc, EPWM_TBCTL);
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reg &= ~(TBCTL_CLKDIV_MASK | TBCTL_HSPCLKDIV_MASK);
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EPWM_WRITE2(sc, EPWM_TBCTL, reg);
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sc->sc_pwm_period = DEFAULT_PWM_PERIOD;
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sc->sc_pwm_dutyA = 0;
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sc->sc_pwm_dutyB = 0;
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am335x_ehrpwm_freq(sc);
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EPWM_WRITE2(sc, EPWM_TBPRD, sc->sc_pwm_period - 1);
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EPWM_WRITE2(sc, EPWM_CMPA, sc->sc_pwm_dutyA);
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EPWM_WRITE2(sc, EPWM_CMPB, sc->sc_pwm_dutyB);
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EPWM_WRITE2(sc, EPWM_TBPRD, DEFAULT_PWM_PERIOD - 1);
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EPWM_WRITE2(sc, EPWM_CMPA, 0);
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EPWM_WRITE2(sc, EPWM_CMPB, 0);
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EPWM_WRITE2(sc, EPWM_AQCTLA, (AQCTL_ZRO_SET | AQCTL_CAU_CLEAR));
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EPWM_WRITE2(sc, EPWM_AQCTLB, (AQCTL_ZRO_SET | AQCTL_CBU_CLEAR));
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