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Compaq Smart RAID driver for -current. Based on the original ida.c

Browse source 
driver by Mark Dawson.  This probably needs some work, but is stable
enough to boot a RAID-only configuration, and survive `make world'.
This commit is contained in:
Jonathan Lemon 1999-06-24 03:33:30 +00:00
parent 0f17f360a5
commit db57feb70b
7 changed files with 1506 additions and 1786 deletions
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512
sys/dev/ida/ida.c Normal file
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/*-
* Copyright (c) 1999 Jonathan Lemon
* All rights reserved.
*
# Derived from the original IDA Compaq RAID driver, which is
* Copyright (c) 1996, 1997, 1998, 1999
* Mark Dawson and David James. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
/*
* Generic driver for Compaq SMART RAID adapters.
*
* Specific probe routines are in:
* pci/ida_pci.c
* i386/eisa/ida_eisa.c
*/
#include <pci.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/buf.h>
#include <sys/bus.h>
#include <sys/device.h>
#include <sys/devicestat.h>
#if NPCI > 0
#include <machine/bus_memio.h>
#endif
#include <machine/bus_pio.h>
#include <machine/bus.h>
#include <machine/clock.h>
#include <sys/rman.h>
#include <dev/ida/idareg.h>
#include <dev/ida/idavar.h>
#define ida_inl(ida, port) \
bus_space_read_4((ida)->tag, (ida)->bsh, port)
#define ida_outl(ida, port, val) \
bus_space_write_4((ida)->tag, (ida)->bsh, port, val)
/* prototypes */
static void ida_alloc_qcb(struct ida_softc *ida);
static void ida_construct_qcb(struct ida_softc *ida);
static void ida_start(struct ida_softc *ida);
static void ida_done(struct ida_softc *ida, struct ida_qcb *qcb);
void
ida_free(struct ida_softc *ida)
{
/*
* still need to call bus_dmamap_destroy() for each map created
* in ida_alloc_qcb().
*/
if (ida->hwqcb_busaddr)
bus_dmamap_unload(ida->hwqcb_dmat, ida->hwqcb_dmamap);
if (ida->hwqcbs)
bus_dmamem_free(ida->hwqcb_dmat, ida->hwqcbs,
ida->hwqcb_dmamap);
if (ida->buffer_dmat)
bus_dma_tag_destroy(ida->buffer_dmat);
if (ida->hwqcb_dmat)
bus_dma_tag_destroy(ida->hwqcb_dmat);
if (ida->qcbs != NULL)
free(ida->qcbs, M_DEVBUF);
if (ida->ih != NULL)
bus_teardown_intr(ida->dev, ida->irq, ida->ih);
if (ida->irq != NULL)
bus_release_resource(ida->dev, ida->irq_res_type,
0, ida->irq);
if (ida->parent_dmat != NULL)
bus_dma_tag_destroy(ida->parent_dmat);
if (ida->regs != NULL)
bus_release_resource(ida->dev, ida->regs_res_type,
ida->regs_res_id, ida->regs);
}
/*
* record bus address from bus_dmamap_load
*/
static void
ida_dma_map_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
{
bus_addr_t *baddr;
baddr = (bus_addr_t *)arg;
*baddr = segs->ds_addr;
}
static __inline struct ida_qcb *
ida_get_qcb(struct ida_softc *ida)
{
struct ida_qcb *qcb;
if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL) {
SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle);
} else {
ida_alloc_qcb(ida);
if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL)
SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle);
}
return (qcb);
}
/*
* XXX
* since we allocate all QCB space up front during initialization, then
* why bother with this routine?
*/
static void
ida_alloc_qcb(struct ida_softc *ida)
{
struct ida_qcb *qcb;
int error;
if (ida->num_qcbs >= IDA_QCB_MAX)
return;
qcb = &ida->qcbs[ida->num_qcbs];
error = bus_dmamap_create(ida->buffer_dmat, /*flags*/0, &qcb->dmamap);
if (error != 0)
return;
qcb->flags = QCB_FREE;
qcb->hwqcb = &ida->hwqcbs[ida->num_qcbs];
qcb->hwqcb->qcb = qcb;
SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
ida->num_qcbs++;
}
int
ida_init(struct ida_softc *ida)
{
int error;
ida->unit = device_get_unit(ida->dev);
ida->tag = rman_get_bustag(ida->regs);
ida->bsh = rman_get_bushandle(ida->regs);
SLIST_INIT(&ida->free_qcbs);
STAILQ_INIT(&ida->qcb_queue);
bufq_init(&ida->buf_queue);
ida->qcbs = (struct ida_qcb *)
malloc(IDA_QCB_MAX * sizeof(struct ida_qcb), M_DEVBUF, M_NOWAIT);
if (ida->qcbs == NULL)
return (ENOMEM);
bzero(ida->qcbs, IDA_QCB_MAX * sizeof(struct ida_qcb));
/*
* Create our DMA tags
*/
/* DMA tag for our hardware QCB structures */
error = bus_dma_tag_create(ida->parent_dmat,
/*alignment*/0, /*boundary*/0,
/*lowaddr*/BUS_SPACE_MAXADDR, /*highaddr*/BUS_SPACE_MAXADDR,
/*filter*/NULL, /*filterarg*/NULL,
IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
/*nsegments*/1, /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
/*flags*/0, &ida->hwqcb_dmat);
if (error)
return (ENOMEM);
/* DMA tag for mapping buffers into device space */
error = bus_dma_tag_create(ida->parent_dmat,
/*alignment*/0, /*boundary*/0,
/*lowaddr*/BUS_SPACE_MAXADDR, /*highaddr*/BUS_SPACE_MAXADDR,
/*filter*/NULL, /*filterarg*/NULL,
/*maxsize*/MAXBSIZE, /*nsegments*/IDA_NSEG,
/*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0, &ida->buffer_dmat);
if (error)
return (ENOMEM);
/* Allocation of hardware QCBs */
/* XXX allocation is rounded to hardware page size */
error = bus_dmamem_alloc(ida->hwqcb_dmat,
(void **)&ida->hwqcbs, BUS_DMA_NOWAIT, &ida->hwqcb_dmamap);
if (error)
return (ENOMEM);
/* And permanently map them in */
bus_dmamap_load(ida->hwqcb_dmat, ida->hwqcb_dmamap,
ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
ida_dma_map_cb, &ida->hwqcb_busaddr, /*flags*/0);
bzero(ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb));
ida_alloc_qcb(ida); /* allocate an initial qcb */
return (0);
}
void
ida_attach(struct ida_softc *ida)
{
struct ida_controller_info cinfo;
int error, i;
ida_outl(ida, R_INT_MASK, INT_DISABLE);
error = ida_command(ida, CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo),
IDA_CONTROLLER, DMA_DATA_IN);
if (error) {
device_printf(ida->dev, "CMD_GET_CTRL_INFO failed.\n");
return;
}
device_printf(ida->dev, "drives=%d firm_rev=%c%c%c%c\n",
cinfo.num_drvs, cinfo.firm_rev[0], cinfo.firm_rev[1],
cinfo.firm_rev[2], cinfo.firm_rev[3]);
ida->num_drives = cinfo.num_drvs;
for (i = 0; i < ida->num_drives; i++)
device_add_child(ida->dev, "id", i, NULL);
bus_generic_attach(ida->dev);
ida_outl(ida, R_INT_MASK, INT_ENABLE);
}
static void
ida_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
{
struct ida_hardware_qcb *hwqcb = (struct ida_hardware_qcb *)arg;
int i;
hwqcb->hdr.size = (sizeof(struct ida_req) +
sizeof(struct ida_sgb) * IDA_NSEG) >> 2;
for (i = 0; i < nsegments; i++) {
hwqcb->seg[i].addr = segs[i].ds_addr;
hwqcb->seg[i].length = segs[i].ds_len;
}
hwqcb->req.sgcount = nsegments;
}
int
ida_command(struct ida_softc *ida, int command, void *data, int datasize,
int drive, int flags)
{
struct ida_hardware_qcb *hwqcb;
struct ida_qcb *qcb;
bus_dmasync_op_t op;
int s;
s = splbio();
qcb = ida_get_qcb(ida);
splx(s);
if (qcb == NULL) {
printf("ida_command: out of QCBs");
return (1);
}
hwqcb = qcb->hwqcb;
bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req));
bus_dmamap_load(ida->buffer_dmat, qcb->dmamap,
(void *)data, datasize, ida_setup_dmamap, hwqcb, 0);
op = qcb->flags & DMA_DATA_IN ?
BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE;
bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
hwqcb->hdr.drive = drive; /* XXX */
hwqcb->req.bcount = howmany(datasize, DEV_BSIZE);
hwqcb->req.command = command;
qcb->flags = flags | IDA_COMMAND;
s = splbio();
STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe);
ida_start(ida);
ida_wait(ida, qcb, 500);
splx(s);
/* XXX should have status returned here? */
/* XXX have "status pointer" area in QCB? */
return (0);
}
void
ida_submit_buf(struct ida_softc *ida, struct buf *bp)
{
bufq_insert_tail(&ida->buf_queue, bp);
ida_construct_qcb(ida);
ida_start(ida);
}
static void
ida_construct_qcb(struct ida_softc *ida)
{
struct ida_hardware_qcb *hwqcb;
struct ida_qcb *qcb;
bus_dmasync_op_t op;
struct buf *bp;
bp = bufq_first(&ida->buf_queue);
if (bp == NULL)
return; /* no more buffers */
qcb = ida_get_qcb(ida);
if (qcb == NULL)
return; /* out of resources */
bufq_remove(&ida->buf_queue, bp);
qcb->buf = bp;
qcb->flags = 0;
hwqcb = qcb->hwqcb;
bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req));
bus_dmamap_load(ida->buffer_dmat, qcb->dmamap,
(void *)bp->b_data, bp->b_bcount, ida_setup_dmamap, hwqcb, 0);
op = qcb->flags & DMA_DATA_IN ?
BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE;
bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
/*
* XXX
*/
{
struct id_softc *drv = (struct id_softc *)bp->b_driver1;
hwqcb->hdr.drive = drv->unit;
}
hwqcb->req.blkno = bp->b_pblkno;
hwqcb->req.bcount = howmany(bp->b_bcount, DEV_BSIZE);
hwqcb->req.command = bp->b_flags & B_READ ? CMD_READ : CMD_WRITE;
STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe);
}
static __inline bus_addr_t
idahwqcbvtop(struct ida_softc *ida, struct ida_hardware_qcb *hwqcb)
{
return (ida->hwqcb_busaddr +
((bus_addr_t)hwqcb - (bus_addr_t)ida->hwqcbs));
}
static __inline struct ida_qcb *
idahwqcbptov(struct ida_softc *ida, bus_addr_t hwqcb_addr)
{
struct ida_hardware_qcb *hwqcb;
hwqcb = (struct ida_hardware_qcb *)
((bus_addr_t)ida->hwqcbs + (hwqcb_addr - ida->hwqcb_busaddr));
return (hwqcb->qcb);
}
/*
* This routine will be called from ida_intr in order to queue up more
* I/O, meaning that we may be in an interrupt context. Hence, we should
* not muck around with spl() in this routine.
*/
static void
ida_start(struct ida_softc *ida)
{
struct ida_qcb *qcb;
while ((qcb = STAILQ_FIRST(&ida->qcb_queue)) != NULL) {
if (ida_inl(ida, R_CMD_FIFO) == 0)
break; /* fifo is full */
STAILQ_REMOVE_HEAD(&ida->qcb_queue, link.stqe);
/*
* XXX
* place the qcb on an active list and set a timeout?
*/
qcb->state = QCB_ACTIVE;
/*
* XXX
* cache the physaddr so we don't keep doing this?
*/
ida_outl(ida, R_CMD_FIFO, idahwqcbvtop(ida, qcb->hwqcb));
}
}
void
ida_wait(struct ida_softc *ida, struct ida_qcb *qcb, int delay)
{
struct ida_qcb *qcb_done = NULL;
bus_addr_t completed;
if (ida->flags & IDA_ATTACHED) {
if (tsleep((caddr_t)qcb, PRIBIO, "idacmd", delay))
panic("ida_command: timeout waiting for interrupt");
return;
}
while ((completed = ida_inl(ida, R_DONE_FIFO)) == 0) {
if (delay-- == 0)
panic("ida_wait: timeout waiting for completion");
DELAY(10);
}
qcb_done = idahwqcbptov(ida, completed & ~3);
if (qcb_done != qcb)
panic("ida_wait: incorrect qcb returned");
ida_done(ida, qcb);
return;
}
void
ida_intr(void *data)
{
struct ida_softc *ida;
struct ida_qcb *qcb;
bus_addr_t completed;
ida = (struct ida_softc *)data;
if (ida_inl(ida, R_INT_PENDING) == 0)
return; /* not our interrupt */
while ((completed = ida_inl(ida, R_DONE_FIFO)) != 0) {
qcb = idahwqcbptov(ida, completed & ~3);
if (qcb == NULL || qcb->state != QCB_ACTIVE) {
device_printf(ida->dev,
"ignoring completion %x\n", completed);
continue;
}
ida_done(ida, qcb);
}
ida_start(ida);
}
/*
* should switch out command type; may be status, not just I/O.
*/
static void
ida_done(struct ida_softc *ida, struct ida_qcb *qcb)
{
int error = 0;
/*
* finish up command
*/
if (qcb->flags & DMA_DATA_TRANSFER) {
bus_dmasync_op_t op;
op = qcb->flags & DMA_DATA_IN ?
BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE;
bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
bus_dmamap_unload(ida->buffer_dmat, qcb->dmamap);
}
if (qcb->hwqcb->req.error & SOFT_ERROR)
device_printf(ida->dev, "soft error\n");
if (qcb->hwqcb->req.error & HARD_ERROR) {
error = 1;
device_printf(ida->dev, "hard error\n");
}
if (qcb->hwqcb->req.error & CMD_REJECTED) {
error = 1;
device_printf(ida->dev, "invalid request\n");
}
if (qcb->flags & IDA_COMMAND) {
if (ida->flags & IDA_ATTACHED)
wakeup(qcb);
} else {
if (error)
qcb->buf->b_flags |= B_ERROR;
id_intr(qcb->buf);
}
qcb->state = QCB_FREE;
SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
ida_construct_qcb(ida);
}

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sys/dev/ida/ida_disk.c Normal file
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/*-
* Copyright (c) 1999 Jonathan Lemon
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
/*
* Disk driver for Compaq SMART RAID adapters.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/buf.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/device.h>
#include <sys/devicestat.h>
#include <sys/disklabel.h>
#include <sys/diskslice.h>
#if NPCI > 0
#include <machine/bus_memio.h>
#endif
#include <machine/bus_pio.h>
#include <machine/bus.h>
#include <machine/clock.h>
#include <sys/rman.h>
#include <dev/ida/idareg.h>
#include <dev/ida/idavar.h>
/* prototypes */
static void id_drvinit(void);
static int idprobe(device_t dev);
static int idattach(device_t dev);
static d_open_t idopen;
static d_close_t idclose;
static d_strategy_t idstrategy;
static d_ioctl_t idioctl;
static d_psize_t idsize;
#define ID_BDEV_MAJOR 29
#define ID_CDEV_MAJOR 109
#define WD_BDEV_MAJOR 0
#define WD_CDEV_MAJOR 3
static struct cdevsw id_cdevsw = {
/* open */ idopen,
/* close */ idclose,
/* read */ physread,
/* write */ physwrite,
/* ioctl */ idioctl,
/* stop */ nostop,
/* reset */ noreset,
/* devtotty */ nodevtotty,
/* poll */ nopoll,
/* mmap */ nommap,
/* strategy */ idstrategy,
/* name */ "id",
/* parms */ noparms,
/* maj */ ID_CDEV_MAJOR,
/* dump */ nodump,
/* psize */ idsize,
/* flags */ D_DISK,
/* maxio */ 0,
/* bmaj */ ID_BDEV_MAJOR
};
static struct cdevsw stolen_cdevsw;
static devclass_t id_devclass;
static device_method_t id_methods[] = {
DEVMETHOD(device_probe, idprobe),
DEVMETHOD(device_attach, idattach),
{ 0, 0 }
};
static driver_t id_driver = {
"id",
id_methods,
sizeof(struct id_softc)
};
static __inline struct id_softc *
idgetsoftc(dev_t dev)
{
int unit;
unit = dkunit(dev);
return ((struct id_softc *)devclass_get_softc(id_devclass, unit));
}
static int
idopen(dev_t dev, int flags, int fmt, struct proc *p)
{
struct id_softc *drv;
struct disklabel label;
int error;
drv = idgetsoftc(dev);
if (drv == NULL)
return (ENXIO);
/* XXX block against race where > 1 person is reading label? */
bzero(&label, sizeof(label));
label.d_type = DTYPE_SCSI; /* XXX should this be DTYPE_RAID? */
/*
strncpy(label.d_typename, ...
strncpy(label.d_packname, ...
*/
label.d_secsize = drv->secsize;
label.d_nsectors = drv->sectors;
label.d_ntracks = drv->heads;
label.d_ncylinders = drv->cylinders;
label.d_secpercyl = drv->sectors * drv->heads;
label.d_secperunit = drv->secperunit;
/* Initialize slice tables. */
error = dsopen("id", dev, fmt, 0, &drv->slices, &label,
idstrategy, (ds_setgeom_t *)NULL, &id_cdevsw);
return (error);
}
static int
idclose(dev_t dev, int flags, int fmt, struct proc *p)
{
struct id_softc *drv;
drv = idgetsoftc(dev);
if (drv == NULL)
return (ENXIO);
dsclose(dev, fmt, drv->slices);
return (0);
}
static int
idioctl(dev_t dev, u_long cmd, caddr_t addr, int32_t flag, struct proc *p)
{
struct id_softc *drv;
int error;
drv = idgetsoftc(dev);
if (drv == NULL)
return (ENXIO);
error = dsioctl("id", dev, cmd, addr, flag, &drv->slices,
idstrategy, (ds_setgeom_t *)NULL);
if (error == ENOIOCTL)
return (ENOTTY);
return (error);
}
static int
idsize(dev_t dev)
{
struct id_softc *drv;
drv = idgetsoftc(dev);
if (drv == NULL)
return (ENXIO);
return (dssize(dev, &drv->slices, idopen, idclose));
}
/*
* Read/write routine for a buffer. Finds the proper unit, range checks
* arguments, and schedules the transfer. Does not wait for the transfer
* to complete. Multi-page transfers are supported. All I/O requests must
* be a multiple of a sector in length.
*/
static void
idstrategy(struct buf *bp)
{
struct id_softc *drv;
int s;
drv = idgetsoftc(bp->b_dev);
if (drv == NULL) {
bp->b_error = EINVAL;
goto bad;
}
if (dscheck(bp, drv->slices) <= 0)
goto done;
/*
* software write protect check
*/
if (drv->flags & DRV_WRITEPROT && (bp->b_flags & B_READ) == 0) {
bp->b_error = EROFS;
goto bad;
}
/*
* If it's a null transfer, return immediately
*/
if (bp->b_bcount == 0)
goto done;
bp->b_driver1 = drv;
s = splbio();
devstat_start_transaction(&drv->stats);
ida_submit_buf(drv->controller, bp);
splx(s);
return;
bad:
bp->b_flags |= B_ERROR;
done:
/*
* Correctly set the buf to indicate a completed transfer
*/
bp->b_resid = bp->b_bcount;
biodone(bp);
return;
}
void
id_intr(struct buf *bp)
{
struct id_softc *drv = (struct id_softc *)bp->b_driver1;
if (bp->b_flags & B_ERROR)
bp->b_error = EIO;
else
bp->b_resid = 0;
biodone(bp);
devstat_end_transaction(&drv->stats,
bp->b_bcount - bp->b_resid, DEVSTAT_TAG_NONE,
(bp->b_flags & B_READ) ? DEVSTAT_READ : DEVSTAT_WRITE);
}
static void
id_drvinit(void)
{
static int devsw_installed = 0;
if (devsw_installed)
return; /* XXX is this needed? */
cdevsw_add(&id_cdevsw);
stolen_cdevsw = id_cdevsw;
stolen_cdevsw.d_maj = WD_CDEV_MAJOR;
stolen_cdevsw.d_bmaj = WD_BDEV_MAJOR;
cdevsw_add(&stolen_cdevsw);
devsw_installed = 1;
}
static int
idprobe(device_t dev)
{
id_drvinit();
device_set_desc(dev, "Compaq Logical Drive");
return (0);
}
static int
idattach(device_t dev)
{
struct ida_drive_info dinfo;
struct id_softc *drv;
device_t parent;
int error;
drv = (struct id_softc *)device_get_softc(dev);
parent = device_get_parent(dev);
drv->controller = (struct ida_softc *)device_get_softc(parent);
drv->unit = device_get_unit(dev);
error = ida_command(drv->controller, CMD_GET_LOG_DRV_INFO,
&dinfo, sizeof(dinfo), drv->unit, DMA_DATA_IN);
if (error) {
device_printf(dev, "CMD_GET_LOG_DRV_INFO failed\n");
return (ENXIO);
}
drv->cylinders = dinfo.ncylinders;
drv->heads = dinfo.nheads;
drv->sectors = dinfo.nsectors;
drv->secsize = dinfo.secsize;
drv->secperunit = dinfo.secperunit;
/* XXX
* other initialization
*/
device_printf(dev, "%uMB (%u sectors), blocksize=%d\n",
drv->secperunit / ((1024 * 1024) / drv->secsize),
drv->secperunit, drv->secsize);
devstat_add_entry(&drv->stats, "id", drv->unit, drv->secsize,
DEVSTAT_NO_ORDERED_TAGS,
DEVSTAT_TYPE_DIRECT | DEVSTAT_TYPE_IF_OTHER, DEVSTAT_PRIORITY_DA);
return (0);
}
DEV_DRIVER_MODULE(id, ida, id_driver, id_devclass,
ID_CDEV_MAJOR, ID_BDEV_MAJOR, id_cdevsw, 0, 0);

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/*-
* Copyright (c) 1999 Jonathan Lemon
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
#include <pci.h>
#if NPCI > 0
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/buf.h>
#include <sys/bus.h>
#include <sys/device.h>
#include <sys/devicestat.h>
#include <machine/bus_memio.h>
#include <machine/bus_pio.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <pci/pcireg.h>
#include <pci/pcivar.h>
#include <dev/ida/idavar.h>
#define IDA_PCI_MAX_DMA_ADDR 0xFFFFFFFF
#define IDA_PCI_MAX_DMA_COUNT 0xFFFFFFFF
#define IDA_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
#define IDA_DEVICEID_SMART 0xAE100E11
static struct {
u_long board;
char *desc;
} board_id[] = {
{ 0x4030, "Compaq SMART-2/P array controller" },
{ 0x4031, "Compaq SMART-2SL array controller" },
{ 0x4032, "Compaq Smart Array 3200 controller" },
{ 0x4033, "Compaq Smart Array 3100ES controller" },
{ 0x4034, "Compaq Smart Array 221 controller" },
{ 0, "" },
};
static int ida_pci_probe(device_t dev);
static int ida_pci_attach(device_t dev);
static void ida_pci_print_child(device_t bus, device_t dev);
static device_method_t ida_pci_methods[] = {
DEVMETHOD(device_probe, ida_pci_probe),
DEVMETHOD(device_attach, ida_pci_attach),
DEVMETHOD(bus_print_child, ida_pci_print_child),
{ 0, 0 }
};
static driver_t ida_pci_driver = {
"ida",
ida_pci_methods,
sizeof(struct ida_softc)
};
static devclass_t ida_devclass;
static int
ida_pci_probe(device_t dev)
{
u_long board;
int i;
if (pci_get_devid(dev) == IDA_DEVICEID_SMART) {
board = pci_get_subdevice(dev);
for (i = 0; board_id[i].board; i++) {
if (board_id[i].board == board) {
device_set_desc(dev, board_id[i].desc);
return (0);
}
}
/*
* It's an unknown Compaq SMART device, but assume we
* can support it.
*/
device_set_desc(dev, "Unknown Compaq Smart Array controller");
return (0);
}
return (ENXIO);
}
static int
ida_pci_attach(device_t dev)
{
struct ida_softc *ida;
u_int command;
int error, rid;
command = pci_read_config(dev, PCIR_COMMAND, 1);
/*
* for multiple card types, need to re-determine which type is
* being attached here
*/
/*
* it appears that this board only does MEMIO access.
*/
if ((command & PCIM_CMD_MEMEN) == 0) {
device_printf(dev, "Only memory mapped I/O is supported\n");
return (ENXIO);
}
ida = (struct ida_softc *)device_get_softc(dev);
ida->dev = dev;
ida->regs_res_type = SYS_RES_MEMORY;
ida->regs_res_id = IDA_PCI_MEMADDR;
ida->regs = bus_alloc_resource(dev, ida->regs_res_type,
&ida->regs_res_id, 0, ~0, 1, RF_ACTIVE);
if (ida->regs == NULL) {
device_printf(dev, "can't allocate register resources\n");
return (ENOMEM);
}
error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/0,
/*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
/*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
/*maxsize*/MAXBSIZE, /*nsegments*/IDA_NSEG,
/*maxsegsize*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/BUS_DMA_ALLOCNOW,
&ida->parent_dmat);
if (error != 0) {
device_printf(dev, "can't allocate DMA tag\n");
ida_free(ida);
return (ENOMEM);
}
rid = 0;
ida->irq_res_type = SYS_RES_IRQ;
ida->irq = bus_alloc_resource(dev, ida->irq_res_type, &rid,
0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
if (ida->irq == NULL) {
ida_free(ida);
return (ENOMEM);
}
error = bus_setup_intr(dev, ida->irq, INTR_TYPE_BIO,
ida_intr, ida, &ida->ih);
if (error) {
device_printf(dev, "can't setup interrupt\n");
ida_free(ida);
return (ENOMEM);
}
error = ida_init(ida);
if (error) {
ida_free(ida);
return (error);
}
ida_attach(ida);
ida->flags = IDA_ATTACHED;
return (0);
}
static void
ida_pci_print_child(device_t bus, device_t dev)
{
printf(" on %s%d", device_get_name(bus), device_get_unit(bus));
}
DRIVER_MODULE(ida, pci, ida_pci_driver, ida_devclass, 0, 0);
#endif /* NPCI > 0 */

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/*-
* Copyright (c) 1999 Jonathan Lemon
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
/*
* #defines and software structures for the Compaq RAID card
*/
/*
* board register offsets
*/
#define R_CMD_FIFO 0x04
#define R_DONE_FIFO 0x08
#define R_INT_MASK 0x0C
#define R_STATUS 0x10
#define R_INT_PENDING 0x14
/*
* interrupt mask values
*/
#define INT_DISABLE 0x00
#define INT_ENABLE 0x01
/*
* return status codes
*/
#define SOFT_ERROR 0x02
#define HARD_ERROR 0x04
#define CMD_REJECTED 0x14
/*
* command types
*/
#define CMD_GET_LOG_DRV_INFO 0x10
#define CMD_GET_CTRL_INFO 0x11
#define CMD_SENSE_DRV_STATUS 0x12
#define CMD_START_RECOVERY 0x13
#define CMD_GET_PHYS_DRV_INFO 0x15
#define CMD_BLINK_DRV_LEDS 0x16
#define CMD_SENSE_DRV_LEDS 0x17
#define CMD_GET_LOG_DRV_EXT 0x18
#define CMD_GET_CTRL_INFO 0x11
#define CMD_READ 0x20
#define CMD_WRITE 0x30
#define CMD_WRITE_MEDIA 0x31
#define CMD_GET_CONFIG 0x50
#define CMD_SET_CONFIG 0x51
#define CMD_FLUSH_CACHE 0xc2
/*
* command structures
*/
struct ida_drive_info {
u_int16_t secsize __attribute__ ((packed));
u_int32_t secperunit __attribute__ ((packed));
u_int16_t ncylinders __attribute__ ((packed));
u_int8_t nheads __attribute__ ((packed));
u_int8_t signature __attribute__ ((packed));
u_int8_t psectors __attribute__ ((packed));
u_int16_t wprecomp __attribute__ ((packed));
u_int8_t max_acc __attribute__ ((packed));
u_int8_t control __attribute__ ((packed));
u_int16_t pcylinders __attribute__ ((packed));
u_int8_t ptracks __attribute__ ((packed));
u_int16_t landing_zone __attribute__ ((packed));
u_int8_t nsectors __attribute__ ((packed));
u_int8_t checksum __attribute__ ((packed));
u_int8_t mirror __attribute__ ((packed));
};
struct ida_controller_info {
u_int8_t num_drvs __attribute__ ((packed));
u_int32_t signature __attribute__ ((packed));
u_int8_t firm_rev[4] __attribute__ ((packed));
};

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/*-
* Copyright (c) 1999 Jonathan Lemon
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
/*
* software structures for the Compaq RAID controller
*/
#ifndef _IDAVAR_H
#define _IDAVAR_H
struct ida_hdr {
u_int8_t drive; /* logical drive */
u_int8_t priority; /* block priority */
u_int16_t size; /* size of request, in words */
};
struct ida_req {
u_int16_t next; /* offset of next request */
u_int8_t command; /* command */
u_int8_t error; /* return error code */
u_int32_t blkno; /* block number */
u_int16_t bcount; /* block count */
u_int8_t sgcount; /* number of scatter/gather entries */
u_int8_t spare; /* reserved */
};
struct ida_sgb {
u_int32_t length; /* length of S/G segment */
u_int32_t addr; /* physical address of block */
};
#define IDA_NSEG 32 /* maximum number of segments */
/*
* right now, this structure totals 276 bytes.
*/
struct ida_hardware_qcb {
struct ida_hdr hdr; /* 4 */
struct ida_req req; /* 12 */
struct ida_sgb seg[IDA_NSEG]; /* 256 */
struct ida_qcb *qcb; /* 4 - qcb backpointer */
};
typedef enum {
QCB_FREE = 0x0000,
QCB_ACTIVE = 0x0001, /* waiting for completion */
} qcb_state;
#define DMA_DATA_IN 0x0001
#define DMA_DATA_OUT 0x0002
#define IDA_COMMAND 0x0004
#define DMA_DATA_TRANSFER (DMA_DATA_IN | DMA_DATA_OUT)
#define IDA_QCB_MAX 256
#define IDA_CONTROLLER 0 /* drive "number" for controller */
struct ida_qcb {
struct ida_hardware_qcb *hwqcb;
qcb_state state;
short flags;
union {
STAILQ_ENTRY(ida_qcb) stqe;
SLIST_ENTRY(ida_qcb) sle;
} link;
bus_dmamap_t dmamap;
struct buf *buf; /* buf associated with qcb */
};
/*
* flags for the controller
*/
#define IDA_ATTACHED 0x01 /* attached, interrupts okay */
struct ida_softc {
device_t dev;
int unit;
int regs_res_type;
int regs_res_id;
struct resource *regs;
int irq_res_type;
struct resource *irq;
void *ih;
bus_space_tag_t tag;
bus_space_handle_t bsh;
/* various DMA tags */
bus_dma_tag_t parent_dmat;
bus_dma_tag_t buffer_dmat;
bus_dma_tag_t hwqcb_dmat;
bus_dmamap_t hwqcb_dmamap;
bus_addr_t hwqcb_busaddr;
bus_dma_tag_t sg_dmat;
int num_drives;
int num_qcbs;
int flags;
struct ida_hardware_qcb *hwqcbs; /* HW QCB array */
struct ida_qcb *qcbs; /* kernel QCB array */
SLIST_HEAD(, ida_qcb) free_qcbs;
STAILQ_HEAD(, ida_qcb) qcb_queue;
struct buf_queue_head buf_queue;
};
/*
* drive flags
*/
#define DRV_WRITEPROT 0x0001
struct id_softc {
device_t dev;
struct ida_softc *controller;
struct diskslices *slices;
struct devstat stats;
int unit;
int cylinders;
int heads;
int sectors;
int secsize;
int secperunit;
int flags;
};
extern struct ida_softc *ida_alloc(device_t dev, struct resource *regs,
int regs_type, int regs_id, bus_dma_tag_t parent_dmat);
extern void ida_free(struct ida_softc *ida);
extern int ida_init(struct ida_softc *ida);
extern void ida_attach(struct ida_softc *ida);
extern int ida_command(struct ida_softc *ida, int command, void *data,
int datasize, int drive, int flags);
extern void ida_submit_buf(struct ida_softc *ida, struct buf *bp);
extern void ida_intr(void *data);
extern void id_intr(struct buf *bp);
#endif /* _IDAVAR_H */

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199
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/*-
* Copyright (c) 1999 Jonathan Lemon
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id$
*/
#include <pci.h>
#if NPCI > 0
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/buf.h>
#include <sys/bus.h>
#include <sys/device.h>
#include <sys/devicestat.h>
#include <machine/bus_memio.h>
#include <machine/bus_pio.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <pci/pcireg.h>
#include <pci/pcivar.h>
#include <dev/ida/idavar.h>
#define IDA_PCI_MAX_DMA_ADDR 0xFFFFFFFF
#define IDA_PCI_MAX_DMA_COUNT 0xFFFFFFFF
#define IDA_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
#define IDA_DEVICEID_SMART 0xAE100E11
static struct {
u_long board;
char *desc;
} board_id[] = {
{ 0x4030, "Compaq SMART-2/P array controller" },
{ 0x4031, "Compaq SMART-2SL array controller" },
{ 0x4032, "Compaq Smart Array 3200 controller" },
{ 0x4033, "Compaq Smart Array 3100ES controller" },
{ 0x4034, "Compaq Smart Array 221 controller" },
{ 0, "" },
};
static int ida_pci_probe(device_t dev);
static int ida_pci_attach(device_t dev);
static void ida_pci_print_child(device_t bus, device_t dev);
static device_method_t ida_pci_methods[] = {
DEVMETHOD(device_probe, ida_pci_probe),
DEVMETHOD(device_attach, ida_pci_attach),
DEVMETHOD(bus_print_child, ida_pci_print_child),
{ 0, 0 }
};
static driver_t ida_pci_driver = {
"ida",
ida_pci_methods,
sizeof(struct ida_softc)
};
static devclass_t ida_devclass;
static int
ida_pci_probe(device_t dev)
{
u_long board;
int i;
if (pci_get_devid(dev) == IDA_DEVICEID_SMART) {
board = pci_get_subdevice(dev);
for (i = 0; board_id[i].board; i++) {
if (board_id[i].board == board) {
device_set_desc(dev, board_id[i].desc);
return (0);
}
}
/*
* It's an unknown Compaq SMART device, but assume we
* can support it.
*/
device_set_desc(dev, "Unknown Compaq Smart Array controller");
return (0);
}
return (ENXIO);
}
static int
ida_pci_attach(device_t dev)
{
struct ida_softc *ida;
u_int command;
int error, rid;
command = pci_read_config(dev, PCIR_COMMAND, 1);
/*
* for multiple card types, need to re-determine which type is
* being attached here
*/
/*
* it appears that this board only does MEMIO access.
*/
if ((command & PCIM_CMD_MEMEN) == 0) {
device_printf(dev, "Only memory mapped I/O is supported\n");
return (ENXIO);
}
ida = (struct ida_softc *)device_get_softc(dev);
ida->dev = dev;
ida->regs_res_type = SYS_RES_MEMORY;
ida->regs_res_id = IDA_PCI_MEMADDR;
ida->regs = bus_alloc_resource(dev, ida->regs_res_type,
&ida->regs_res_id, 0, ~0, 1, RF_ACTIVE);
if (ida->regs == NULL) {
device_printf(dev, "can't allocate register resources\n");
return (ENOMEM);
}
error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/0,
/*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
/*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
/*maxsize*/MAXBSIZE, /*nsegments*/IDA_NSEG,
/*maxsegsize*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/BUS_DMA_ALLOCNOW,
&ida->parent_dmat);
if (error != 0) {
device_printf(dev, "can't allocate DMA tag\n");
ida_free(ida);
return (ENOMEM);
}
rid = 0;
ida->irq_res_type = SYS_RES_IRQ;
ida->irq = bus_alloc_resource(dev, ida->irq_res_type, &rid,
0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
if (ida->irq == NULL) {
ida_free(ida);
return (ENOMEM);
}
error = bus_setup_intr(dev, ida->irq, INTR_TYPE_BIO,
ida_intr, ida, &ida->ih);
if (error) {
device_printf(dev, "can't setup interrupt\n");
ida_free(ida);
return (ENOMEM);
}
error = ida_init(ida);
if (error) {
ida_free(ida);
return (error);
}
ida_attach(ida);
ida->flags = IDA_ATTACHED;
return (0);
}
static void
ida_pci_print_child(device_t bus, device_t dev)
{
printf(" on %s%d", device_get_name(bus), device_get_unit(bus));
}
DRIVER_MODULE(ida, pci, ida_pci_driver, ida_devclass, 0, 0);
#endif /* NPCI > 0 */