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cxgbe(4): Check if the firmware supports 512 SGL per FR MR.

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Firmwares >= 1.25.6.0 support 512 SGL entries in a single memory
registration request.

Obtained from:	Chelsio Communications
MFC after:	1 week
Sponsored by:	Chelsio Communications
This commit is contained in:
Navdeep Parhar 2021-06-01 12:14:17 -07:00
parent a45843c8ed
commit db15dbf880
2 changed files with 9 additions and 0 deletions
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1
sys/dev/cxgbe/common/common.h
View file

@ -405,6 +405,7 @@ struct adapter_params {
bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */
bool fr_nsmr_tpte_wr_support; /* FW support for FR_NSMR_TPTE_WR */
bool dev_512sgl_mr; /* FW support for 512 SGL per FR MR */
bool viid_smt_extn_support; /* FW returns vin, vfvld & smt index? */
unsigned int max_pkts_per_eth_tx_pkts_wr;
};

8
sys/dev/cxgbe/t4_main.c
View file

@ -5222,6 +5222,14 @@ get_params__post_init(struct adapter *sc)
else
sc->params.fr_nsmr_tpte_wr_support = false;
/* Support for 512 SGL entries per FR MR. */
param[0] = FW_PARAM_DEV(DEV_512SGL_MR);
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
if (rc == 0)
sc->params.dev_512sgl_mr = val[0] != 0;
else
sc->params.dev_512sgl_mr = false;
param[0] = FW_PARAM_PFVF(MAX_PKTS_PER_ETH_TX_PKTS_WR);
rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val);
if (rc == 0)