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Do not hardcode phy address. Multi-port controllers use different phy
address.
This commit is contained in:
parent
16ddaa3467
commit
daeeb75cec
2 changed files with 14 additions and 12 deletions
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@ -3215,7 +3215,7 @@ bge_attach(device_t dev)
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struct bge_softc *sc;
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uint32_t hwcfg = 0, misccfg, pcistate;
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u_char eaddr[ETHER_ADDR_LEN];
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int capmask, error, msicount, phy_addr, reg, rid, trys;
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int capmask, error, msicount, reg, rid, trys;
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sc = device_get_softc(dev);
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sc->bge_dev = dev;
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@ -3275,7 +3275,7 @@ bge_attach(device_t dev)
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sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid);
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/* Set default PHY address. */
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phy_addr = 1;
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sc->bge_phy_addr = 1;
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/*
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* PHY address mapping for various devices.
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*
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@ -3304,15 +3304,15 @@ bge_attach(device_t dev)
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if (sc->bge_chipid != BGE_CHIPID_BCM5717_A0) {
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if (CSR_READ_4(sc, BGE_SGDIG_STS) &
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BGE_SGDIGSTS_IS_SERDES)
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phy_addr = sc->bge_func_addr + 8;
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sc->bge_phy_addr = sc->bge_func_addr + 8;
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else
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phy_addr = sc->bge_func_addr + 1;
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sc->bge_phy_addr = sc->bge_func_addr + 1;
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} else {
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if (CSR_READ_4(sc, BGE_CPMU_PHY_STRAP) &
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BGE_CPMU_PHY_STRAP_IS_SERDES)
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phy_addr = sc->bge_func_addr + 8;
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sc->bge_phy_addr = sc->bge_func_addr + 8;
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else
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phy_addr = sc->bge_func_addr + 1;
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sc->bge_phy_addr = sc->bge_func_addr + 1;
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}
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}
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@ -3789,13 +3789,13 @@ again:
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bge_asf_driver_up(sc);
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error = mii_attach(dev, &sc->bge_miibus, ifp, bge_ifmedia_upd,
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bge_ifmedia_sts, capmask, phy_addr, MII_OFFSET_ANY,
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bge_ifmedia_sts, capmask, sc->bge_phy_addr, MII_OFFSET_ANY,
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MIIF_DOPAUSE);
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if (error != 0) {
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if (trys++ < 4) {
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device_printf(sc->bge_dev, "Try again\n");
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bge_miibus_writereg(sc->bge_dev, 1, MII_BMCR,
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BMCR_RESET);
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bge_miibus_writereg(sc->bge_dev,
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sc->bge_phy_addr, MII_BMCR, BMCR_RESET);
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goto again;
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}
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device_printf(sc->bge_dev, "attaching PHYs failed\n");
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@ -6017,9 +6017,10 @@ bge_link_upd(struct bge_softc *sc)
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/* Clear the interrupt. */
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CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
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BGE_EVTENB_MI_INTERRUPT);
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bge_miibus_readreg(sc->bge_dev, 1, BRGPHY_MII_ISR);
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bge_miibus_writereg(sc->bge_dev, 1, BRGPHY_MII_IMR,
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BRGPHY_INTRS);
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bge_miibus_readreg(sc->bge_dev, sc->bge_phy_addr,
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BRGPHY_MII_ISR);
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bge_miibus_writereg(sc->bge_dev, sc->bge_phy_addr,
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BRGPHY_MII_IMR, BRGPHY_INTRS);
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}
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return;
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}
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@ -2974,6 +2974,7 @@ struct bge_softc {
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#define BGE_MFW_TYPE_DASH 0x00000008
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int bge_phy_ape_lock;
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int bge_func_addr;
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int bge_phy_addr;
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uint32_t bge_phy_flags;
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#define BGE_PHY_NO_WIRESPEED 0x00000001
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#define BGE_PHY_ADC_BUG 0x00000002
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