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cxgbe(4): Rename lport to hw_port.

Browse source 
No functional change intended.

Sponsored by:	Chelsio Communications

(cherry picked from commit 499ff78fb11a5868dfaeaa3fa86ca782b8f06f27)
This commit is contained in:
Navdeep Parhar 2025-09-28 22:40:24 -07:00
parent f69054d536
commit d99e74711b
7 changed files with 13 additions and 13 deletions
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2
sys/dev/cxgbe/adapter.h
View file

@ -319,7 +319,7 @@ struct port_info {
char lockname[16];
unsigned long flags;
uint8_t lport; /* associated offload logical port */
uint8_t hw_port; /* associated hardware port idx */
int8_t mdio_addr;
uint8_t port_type;
uint8_t mod_type;

2
sys/dev/cxgbe/common/t4_hw.c
View file

@ -9818,11 +9818,11 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf, int port_id)
} while ((adap->params.portvec & (1 << j)) == 0);
}
p->hw_port = j;
p->tx_chan = t4_get_tx_c_chan(adap, j);
p->rx_chan = t4_get_rx_c_chan(adap, j);
p->mps_bg_map = t4_get_mps_bg_map(adap, j);
p->rx_e_chan_map = t4_get_rx_e_chan_map(adap, j);
p->lport = j;
if (!(adap->flags & IS_VF) ||
adap->params.vfres.r_caps & FW_CMD_CAP_PORT) {

2
sys/dev/cxgbe/crypto/t6_kern_tls.c
View file

@ -2003,7 +2003,7 @@ t6_ktls_write_wr(struct sge_txq *txq, void *dst, struct mbuf *m,
if (tlsp->l2te)
t4_l2t_release(tlsp->l2te);
tlsp->l2te = t4_l2t_alloc_tls(tlsp->sc, txq, dst, &ndesc,
vlan_tag, tlsp->vi->pi->lport, eh->ether_dhost);
vlan_tag, tlsp->vi->pi->hw_port, eh->ether_dhost);
if (tlsp->l2te == NULL)
CXGBE_UNIMPLEMENTED("failed to allocate TLS L2TE");
if (ndesc != 0) {

14
sys/dev/cxgbe/t4_l2t.c
View file

@ -119,7 +119,7 @@ find_or_alloc_l2e(struct l2t_data *d, uint16_t vlan, uint8_t port, uint8_t *dmac
first_free = e;
} else if (e->state == L2T_STATE_SWITCHING &&
memcmp(e->dmac, dmac, ETHER_ADDR_LEN) == 0 &&
e->vlan == vlan && e->lport == port)
e->vlan == vlan && e->hw_port == port)
return (e); /* Found existing entry that matches. */
}
@ -156,7 +156,7 @@ mk_write_l2e(struct adapter *sc, struct l2t_entry *e, int sync, int reply,
INIT_TP_WR(req, 0);
OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, idx |
V_SYNC_WR(sync) | V_TID_QID(e->iqid)));
req->params = htons(V_L2T_W_PORT(e->lport) | V_L2T_W_NOREPLY(!reply));
req->params = htons(V_L2T_W_PORT(e->hw_port) | V_L2T_W_NOREPLY(!reply));
req->l2t_idx = htons(idx);
req->vlan = htons(e->vlan);
memcpy(req->dst_mac, e->dmac, sizeof(req->dst_mac));
@ -227,7 +227,7 @@ t4_l2t_alloc_tls(struct adapter *sc, struct sge_txq *txq, void *dst,
e = &d->l2tab[i];
if (e->state != L2T_STATE_TLS)
continue;
if (e->vlan == vlan && e->lport == port &&
if (e->vlan == vlan && e->hw_port == port &&
e->wrq == (struct sge_wrq *)txq &&
memcmp(e->dmac, eth_addr, ETHER_ADDR_LEN) == 0) {
if (atomic_fetchadd_int(&e->refcnt, 1) == 0) {
@ -263,7 +263,7 @@ t4_l2t_alloc_tls(struct adapter *sc, struct sge_txq *txq, void *dst,
/* Initialize the entry. */
e->state = L2T_STATE_TLS;
e->vlan = vlan;
e->lport = port;
e->hw_port = port;
e->iqid = sc->sge.fwq.abs_id;
e->wrq = (struct sge_wrq *)txq;
memcpy(e->dmac, eth_addr, ETHER_ADDR_LEN);
@ -303,7 +303,7 @@ t4_l2t_alloc_switching(struct adapter *sc, uint16_t vlan, uint8_t port,
e->iqid = sc->sge.fwq.abs_id;
e->state = L2T_STATE_SWITCHING;
e->vlan = vlan;
e->lport = port;
e->hw_port = port;
memcpy(e->dmac, eth_addr, ETHER_ADDR_LEN);
atomic_store_rel_int(&e->refcnt, 1);
atomic_subtract_int(&d->nfree, 1);
@ -313,7 +313,7 @@ t4_l2t_alloc_switching(struct adapter *sc, uint16_t vlan, uint8_t port,
e = NULL;
} else {
MPASS(e->vlan == vlan);
MPASS(e->lport == port);
MPASS(e->hw_port == port);
atomic_add_int(&e->refcnt, 1);
}
}
@ -488,7 +488,7 @@ sysctl_l2t(SYSCTL_HANDLER_ARGS)
" %u %2u %c %5u %s",
e->idx, ip, e->dmac[0], e->dmac[1], e->dmac[2],
e->dmac[3], e->dmac[4], e->dmac[5],
e->vlan & 0xfff, vlan_prio(e), e->lport,
e->vlan & 0xfff, vlan_prio(e), e->hw_port,
l2e_state(e), atomic_load_acq_int(&e->refcnt),
e->ifp ? if_name(e->ifp) : "-");
skip:

2
sys/dev/cxgbe/t4_l2t.h
View file

@ -71,7 +71,7 @@ struct l2t_entry {
volatile int refcnt; /* entry reference count */
uint16_t hash; /* hash bucket the entry is on */
uint8_t ipv6; /* entry is for an IPv6 address */
uint8_t lport; /* associated offload logical port */
uint8_t hw_port; /* associated hardware port idx */
uint8_t dmac[ETHER_ADDR_LEN]; /* next hop's MAC address */
};

2
sys/dev/cxgbe/tom/t4_tom.c
View file

@ -1221,7 +1221,7 @@ select_ntuple(struct vi_info *vi, struct l2t_entry *e)
ntuple |= (uint64_t)(F_FT_VLAN_VLD | e->vlan) << tp->vlan_shift;
if (tp->port_shift >= 0)
ntuple |= (uint64_t)e->lport << tp->port_shift;
ntuple |= (uint64_t)e->hw_port << tp->port_shift;
if (tp->protocol_shift >= 0)
ntuple |= (uint64_t)IPPROTO_TCP << tp->protocol_shift;

2
sys/dev/cxgbe/tom/t4_tom_l2t.c
View file

@ -403,7 +403,7 @@ t4_l2t_get(struct port_info *pi, if_t ifp, struct sockaddr *sa)
l2_store(sa, e);
e->ifp = ifp;
e->hash = hash;
e->lport = pi->lport;
e->hw_port = pi->hw_port;
e->wrq = &sc->sge.ctrlq[pi->port_id];
e->iqid = sc->sge.ofld_rxq[pi->vi[0].first_ofld_rxq].iq.abs_id;
atomic_store_rel_int(&e->refcnt, 1);