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marvell: ap806_clock: add missing frequency modes

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In the driver init routine the CPU clock frequency
value is obtained from a dedicated register. Until now
only part of the values were handled by the mv_ap806_clock
driver. Fix that by adding missing cases.

Submitted by: Zyta Szpak <zr@semihalf.com>
MFC after: 1 week
Obtained from: Semihalf
Sponsored by: Marvell

(cherry picked from commit a86b0839d7)
This commit is contained in:
Marcin Wojtas 2021-01-26 11:49:35 +01:00
parent 4d85bfa412
commit cd925aaa73
1 changed files with 30 additions and 4 deletions
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34
sys/arm/mv/mv_ap806_clock.c
View file

@ -136,25 +136,51 @@ mv_ap806_clock_attach(device_t dev)
return (ENXIO);
}
/*
* We might miss some combinations
* Those are the only possible ones on the mcbin
*/
reg = RD4(sc, 0x400);
switch (reg & 0x1f) {
case 0x0:
case 0x1:
clock_freq = 2000000000;
break;
case 0x4:
clock_freq = 1600000000;
break;
case 0x6:
clock_freq = 1800000000;
break;
case 0x7:
clock_freq = 1800000000;
break;
case 0xb:
clock_freq = 1600000000;
break;
case 0xd:
clock_freq = 1600000000;
break;
case 0x13:
clock_freq = 1000000000;
break;
case 0x14:
clock_freq = 1333000000;
break;
case 0x17:
clock_freq = 1333000000;
break;
case 0x19:
clock_freq = 1200000000;
break;
case 0x1a:
clock_freq = 1400000000;
break;
case 0x1b:
clock_freq = 600000000;
break;
case 0x1c:
clock_freq = 800000000;
break;
case 0x1d:
clock_freq = 1000000000;
break;
default:
device_printf(dev, "Cannot guess clock freq with reg %x\n",
reg & 0x1f);