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- Wrap the handler and associated code for collecting completed RX
descriptors that are still marked owned in #ifdef GEM_RINT_TIMEOUT instead of #if 0 for convenience. - Remove stale code and comment about relying on the preset XIF config. - In case of a watchdog timeout call the init function instead of just the start function so the chip is properly reset. Merge from hme(4): - Convert to use bus_dmamap_load_mbuf_sg() for loading RX buffers. - Protect from a duplicate mbuf free panic in case the DMA engine hangs. Reviewed by: yongari Tested on: powerpc(grehan), sparc64 MFC after: 1 week
This commit is contained in:
parent
5a29706504
commit
c3d5598aa8
1 changed files with 23 additions and 31 deletions
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@ -38,6 +38,10 @@ __FBSDID("$FreeBSD$");
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#define GEM_DEBUG
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#endif
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#if 0 /* XXX: In case of emergency, re-enable this. */
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#define GEM_RINT_TIMEOUT
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#endif
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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@ -72,8 +76,6 @@ static void gem_start(struct ifnet *);
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static void gem_stop(struct ifnet *, int);
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static int gem_ioctl(struct ifnet *, u_long, caddr_t);
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static void gem_cddma_callback(void *, bus_dma_segment_t *, int, int);
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static void gem_rxdma_callback(void *, bus_dma_segment_t *, int,
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bus_size_t, int);
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static void gem_txdma_callback(void *, bus_dma_segment_t *, int,
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bus_size_t, int);
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static void gem_tick(void *);
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@ -97,7 +99,7 @@ static void gem_setladrf(struct gem_softc *);
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struct mbuf *gem_get(struct gem_softc *, int, int);
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static void gem_eint(struct gem_softc *, u_int);
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static void gem_rint(struct gem_softc *);
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#if 0
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#ifdef GEM_RINT_TIMEOUT
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static void gem_rint_timeout(void *);
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#endif
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static void gem_tint(struct gem_softc *);
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@ -224,7 +226,6 @@ gem_attach(sc)
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sc->sc_rxsoft[i].rxs_mbuf = NULL;
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}
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gem_mifinit(sc);
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if ((error = mii_phy_probe(sc->sc_dev, &sc->sc_miibus, gem_mediachange,
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@ -320,7 +321,9 @@ gem_attach(sc)
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#endif
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callout_init(&sc->sc_tick_ch, 0);
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#ifdef GEM_RINT_TIMEOUT
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callout_init(&sc->sc_rx_ch, 0);
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#endif
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return (0);
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/*
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@ -426,22 +429,6 @@ gem_cddma_callback(xsc, segs, nsegs, error)
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sc->sc_cddma = segs[0].ds_addr;
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}
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static void
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gem_rxdma_callback(xsc, segs, nsegs, totsz, error)
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void *xsc;
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bus_dma_segment_t *segs;
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int nsegs;
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bus_size_t totsz;
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int error;
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{
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struct gem_rxsoft *rxs = (struct gem_rxsoft *)xsc;
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if (error != 0)
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return;
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KASSERT(nsegs == 1, ("gem_rxdma_callback: bad dma segment count"));
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rxs->rxs_paddr = segs[0].ds_addr;
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}
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static void
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gem_txdma_callback(xsc, segs, nsegs, totsz, error)
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void *xsc;
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@ -986,7 +973,6 @@ gem_load_txmbuf(sc, m0)
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}
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txd.txd_sc = sc;
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txd.txd_txs = txs;
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txs->txs_mbuf = m0;
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txs->txs_firstdesc = sc->sc_txnext;
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error = bus_dmamap_load_mbuf(sc->sc_tdmatag, txs->txs_dmamap, m0,
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gem_txdma_callback, &txd, BUS_DMA_NOWAIT);
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@ -1008,6 +994,7 @@ gem_load_txmbuf(sc, m0)
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#endif
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STAILQ_REMOVE_HEAD(&sc->sc_txfreeq, txs_q);
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STAILQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
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txs->txs_mbuf = m0;
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sc->sc_txnext = GEM_NEXTTX(txs->txs_lastdesc);
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sc->sc_txfree -= txs->txs_ndescs;
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@ -1333,7 +1320,7 @@ gem_tint(sc)
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#endif
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}
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#if 0
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#ifdef GEM_RINT_TIMEOUT
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static void
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gem_rint_timeout(arg)
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void *arg;
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@ -1359,7 +1346,9 @@ gem_rint(sc)
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u_int32_t rxcomp;
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int i, len, progress = 0;
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#ifdef GEM_RINT_TIMEOUT
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callout_stop(&sc->sc_rx_ch);
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#endif
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#ifdef GEM_DEBUG
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CTR1(KTR_GEM, "%s: gem_rint", device_get_name(sc->sc_dev));
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#endif
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@ -1382,7 +1371,7 @@ gem_rint(sc)
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rxstat = GEM_DMA_READ(sc, sc->sc_rxdescs[i].gd_flags);
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if (rxstat & GEM_RD_OWN) {
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#if 0 /* XXX: In case of emergency, re-enable this. */
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#ifdef GEM_RINT_TIMEOUT
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/*
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* The descriptor is still marked as owned, although
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* it is supposed to have completed. This has been
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@ -1472,7 +1461,8 @@ gem_add_rxbuf(sc, idx)
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{
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struct gem_rxsoft *rxs = &sc->sc_rxsoft[idx];
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struct mbuf *m;
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int error;
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bus_dma_segment_t segs[1];
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int error, nsegs;
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m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
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if (m == NULL)
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@ -1492,13 +1482,17 @@ gem_add_rxbuf(sc, idx)
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rxs->rxs_mbuf = m;
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error = bus_dmamap_load_mbuf(sc->sc_rdmatag, rxs->rxs_dmamap,
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m, gem_rxdma_callback, rxs, BUS_DMA_NOWAIT);
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if (error != 0 || rxs->rxs_paddr == 0) {
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error = bus_dmamap_load_mbuf_sg(sc->sc_rdmatag, rxs->rxs_dmamap,
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m, segs, &nsegs, BUS_DMA_NOWAIT);
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/* If nsegs is wrong then the stack is corrupt. */
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KASSERT(nsegs == 1, ("Too many segments returned!"));
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if (error != 0) {
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device_printf(sc->sc_dev, "can't load rx DMA map %d, error = "
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"%d\n", idx, error);
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panic("gem_add_rxbuf"); /* XXX */
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m_freem(m);
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return (ENOBUFS);
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}
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rxs->rxs_paddr = segs[0].ds_addr;
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bus_dmamap_sync(sc->sc_rdmatag, rxs->rxs_dmamap, BUS_DMASYNC_PREREAD);
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@ -1591,7 +1585,7 @@ gem_watchdog(ifp)
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++ifp->if_oerrors;
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/* Try to get more packets going. */
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gem_start(ifp);
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gem_init(ifp);
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}
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/*
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@ -1738,8 +1732,6 @@ gem_mii_statchg(dev)
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bus_space_write_4(t, mac, GEM_MAC_TX_CONFIG, v);
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/* XIF Configuration */
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/* We should really calculate all this rather than rely on defaults */
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v = bus_space_read_4(t, mac, GEM_MAC_XIF_CONFIG);
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v = GEM_MAC_XIF_LINK_LED;
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v |= GEM_MAC_XIF_TX_MII_ENA;
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