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qat: move debugfs handling to separate file

Browse source 
Moved handling of debugfs entries to a separate file.
In addition, it will allow to consolidate the addition of
debugfs entries to a single location in the code.

This implementation adds infrastructure to create (and remove)
debugfs entries at two different stages.
- Done when a device is probed, allows to keep debugfs entries
persistent between a transition in device state (up to down or
vice versa).
- Done after the initialization phase, allows to have debugfs
entries that are accessible only when the device is up.

In addition, moved the creation of debugfs entries for configuration
of the newly created function adf_dbgfs_init() and replace symbolic
permissions with octal permissions when creating the debugfs files.

Added sysctl oids storage for proper cleanup on device down.

Reviewed by:	markj, ziaee
MFC after:	2 weeks
Sponsored by:   Intel Corporation
Differential Revision:  https://reviews.freebsd.org/D50379
This commit is contained in:
Hareshx Sankar Raj 2025-04-30 17:53:56 -04:00 committed by Mark Johnston
parent 4da5c15e5c
commit c38bafee7e
18 changed files with 322 additions and 158 deletions
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11
sys/dev/qat/include/adf_dbgfs.h Normal file
View file

@ -0,0 +1,11 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_DBGFS_H
#define ADF_DBGFS_H
void adf_dbgfs_init(struct adf_accel_dev *accel_dev);
void adf_dbgfs_add(struct adf_accel_dev *accel_dev);
void adf_dbgfs_rm(struct adf_accel_dev *accel_dev);
void adf_dbgfs_exit(struct adf_accel_dev *accel_dev);
#endif

6
sys/dev/qat/include/adf_heartbeat.h
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#ifndef ADF_HEARTBEAT_H_
#define ADF_HEARTBEAT_H_
@ -18,8 +18,8 @@ struct adf_heartbeat {
u64 last_hb_check_time;
enum adf_device_heartbeat_status last_hb_status;
struct qat_sysctl heartbeat;
struct qat_sysctl *heartbeat_sent;
struct qat_sysctl *heartbeat_failed;
struct qat_sysctl heartbeat_sent;
struct qat_sysctl heartbeat_failed;
};
int adf_heartbeat_init(struct adf_accel_dev *accel_dev);

4
sys/dev/qat/include/common/adf_accel_devices.h
View file

@ -685,6 +685,10 @@ struct adf_accel_dev {
struct sysctl_oid *ras_reset;
struct sysctl_oid *pke_replay_dbgfile;
struct sysctl_oid *misc_error_dbgfile;
struct sysctl_oid *fw_version_oid;
struct sysctl_oid *mmp_version_oid;
struct sysctl_oid *hw_version_oid;
struct sysctl_oid *cnv_error_oid;
struct list_head list;
struct adf_accel_pci accel_pci_dev;
struct adf_accel_compat_manager *cm;

42
sys/dev/qat/qat_common/adf_cfg.c
View file

@ -1,15 +1,10 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "adf_accel_devices.h"
#include "adf_cfg.h"
#include "adf_common_drv.h"
#include "adf_cfg_dev_dbg.h"
#include "adf_cfg_device.h"
#include "adf_cfg_sysctl.h"
#include "adf_heartbeat_dbg.h"
#include "adf_ver_dbg.h"
#include "adf_fw_counters.h"
#include "adf_cnvnr_freq_counters.h"
/**
* adf_cfg_dev_add() - Create an acceleration device configuration table.
@ -73,31 +68,13 @@ adf_cfg_dev_add(struct adf_accel_dev *accel_dev)
ADF_CFG_MAX_VAL);
}
if (adf_cfg_sysctl_add(accel_dev))
goto err;
if (adf_cfg_dev_dbg_add(accel_dev))
goto err;
if (!accel_dev->is_vf) {
if (adf_heartbeat_dbg_add(accel_dev))
goto err;
if (adf_ver_dbg_add(accel_dev))
goto err;
if (adf_fw_counters_add(accel_dev))
goto err;
if (adf_cnvnr_freq_counters_add(accel_dev))
goto err;
if (adf_cfg_sysctl_add(accel_dev)) {
free(dev_cfg_data, M_QAT);
accel_dev->cfg = NULL;
return EFAULT;
}
return 0;
err:
free(dev_cfg_data, M_QAT);
accel_dev->cfg = NULL;
return EFAULT;
return 0;
}
static void adf_cfg_section_del_all(struct list_head *head);
@ -142,13 +119,6 @@ adf_cfg_dev_remove(struct adf_accel_dev *accel_dev)
sx_xunlock(&dev_cfg_data->lock);
adf_cfg_sysctl_remove(accel_dev);
adf_cfg_dev_dbg_remove(accel_dev);
if (!accel_dev->is_vf) {
adf_ver_dbg_del(accel_dev);
adf_heartbeat_dbg_del(accel_dev);
adf_fw_counters_remove(accel_dev);
adf_cnvnr_freq_counters_remove(accel_dev);
}
free(dev_cfg_data, M_QAT);
accel_dev->cfg = NULL;

53
sys/dev/qat/qat_common/adf_freebsd_cnvnr_ctrs_dbg.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include <sys/types.h>
#include <sys/sysctl.h>
#include <sys/systm.h>
@ -123,10 +123,12 @@ static int qat_cnvnr_ctrs_dbg_read(SYSCTL_HANDLER_ARGS)
cnvnr_err_str[error_type],
latest_error);
if (bytes_written <= 0) {
printf("ERROR: No space left in CnV ctrs line buffer\n"
"\tAcceleration ID: %d, Engine: %d\n",
accel_dev->accel_id,
ae);
device_printf(
GET_DEV(accel_dev),
"ERROR: No space left in CnV ctrs line buffer\n"
"\tAcceleration ID: %d, Engine: %d\n",
accel_dev->accel_id,
ae);
break;
}
report_ptr += bytes_written;
@ -141,7 +143,6 @@ adf_cnvnr_freq_counters_add(struct adf_accel_dev *accel_dev)
{
struct sysctl_ctx_list *qat_sysctl_ctx;
struct sysctl_oid *qat_cnvnr_ctrs_sysctl_tree;
struct sysctl_oid *oid_rc;
/* Defensive checks */
if (!accel_dev)
@ -154,19 +155,22 @@ adf_cnvnr_freq_counters_add(struct adf_accel_dev *accel_dev)
device_get_sysctl_tree(accel_dev->accel_pci_dev.pci_dev);
/* Create "cnv_error" string type leaf - with callback */
oid_rc = SYSCTL_ADD_PROC(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_cnvnr_ctrs_sysctl_tree),
OID_AUTO,
"cnv_error",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
qat_cnvnr_ctrs_dbg_read,
"IU",
"QAT CnVnR status");
accel_dev->cnv_error_oid =
SYSCTL_ADD_PROC(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_cnvnr_ctrs_sysctl_tree),
OID_AUTO,
"cnv_error",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
qat_cnvnr_ctrs_dbg_read,
"IU",
"QAT CnVnR status");
if (!oid_rc) {
printf("ERROR: Memory allocation failed\n");
if (!accel_dev->cnv_error_oid) {
device_printf(
GET_DEV(accel_dev),
"Failed to create qat cnvnr freq counters sysctl entry.\n");
return ENOMEM;
}
return 0;
@ -175,4 +179,17 @@ adf_cnvnr_freq_counters_add(struct adf_accel_dev *accel_dev)
void
adf_cnvnr_freq_counters_remove(struct adf_accel_dev *accel_dev)
{
struct sysctl_ctx_list *qat_sysctl_ctx;
if (!accel_dev)
return;
qat_sysctl_ctx =
device_get_sysctl_ctx(accel_dev->accel_pci_dev.pci_dev);
if (accel_dev->cnv_error_oid) {
sysctl_ctx_entry_del(qat_sysctl_ctx, accel_dev->cnv_error_oid);
sysctl_remove_oid(accel_dev->cnv_error_oid, 1, 1);
accel_dev->cnv_error_oid = NULL;
}
}

68
sys/dev/qat/qat_common/adf_freebsd_dbgfs.c Normal file
View file

@ -0,0 +1,68 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "adf_accel_devices.h"
#include "adf_cfg_dev_dbg.h"
#include "adf_cnvnr_freq_counters.h"
#include "adf_common_drv.h"
#include "adf_dbgfs.h"
#include "adf_fw_counters.h"
#include "adf_freebsd_pfvf_ctrs_dbg.h"
#include "adf_heartbeat_dbg.h"
#include "adf_ver_dbg.h"
/**
* adf_dbgfs_init() - add persistent debugfs entries
* @accel_dev: Pointer to acceleration device.
*
* This function creates debugfs entries that are persistent through a device
* state change (from up to down or vice versa).
*/
void
adf_dbgfs_init(struct adf_accel_dev *accel_dev)
{
adf_cfg_dev_dbg_add(accel_dev);
}
/**
* adf_dbgfs_exit() - remove persistent debugfs entries
* @accel_dev: Pointer to acceleration device.
*/
void
adf_dbgfs_exit(struct adf_accel_dev *accel_dev)
{
adf_cfg_dev_dbg_remove(accel_dev);
}
/**
* adf_dbgfs_add() - add non-persistent debugfs entries
* @accel_dev: Pointer to acceleration device.
*
* This function creates debugfs entries that are not persistent through
* a device state change (from up to down or vice versa).
*/
void
adf_dbgfs_add(struct adf_accel_dev *accel_dev)
{
if (!accel_dev->is_vf) {
adf_heartbeat_dbg_add(accel_dev);
adf_ver_dbg_add(accel_dev);
adf_fw_counters_add(accel_dev);
adf_cnvnr_freq_counters_add(accel_dev);
}
}
/**
* adf_dbgfs_rm() - remove non-persistent debugfs entries
* @accel_dev: Pointer to acceleration device.
*/
void
adf_dbgfs_rm(struct adf_accel_dev *accel_dev)
{
if (!accel_dev->is_vf) {
adf_cnvnr_freq_counters_remove(accel_dev);
adf_fw_counters_remove(accel_dev);
adf_ver_dbg_del(accel_dev);
adf_heartbeat_dbg_del(accel_dev);
}
}

94
sys/dev/qat/qat_common/adf_freebsd_heartbeat_dbg.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include <sys/types.h>
#include <sys/sysctl.h>
#include <sys/systm.h>
@ -48,7 +48,6 @@ adf_heartbeat_dbg_add(struct adf_accel_dev *accel_dev)
struct sysctl_ctx_list *qat_hb_sysctl_ctx;
struct sysctl_oid *qat_hb_sysctl_tree;
struct adf_heartbeat *hb;
struct sysctl_oid *rc = 0;
if (accel_dev == NULL) {
return EINVAL;
@ -63,43 +62,76 @@ adf_heartbeat_dbg_add(struct adf_accel_dev *accel_dev)
qat_hb_sysctl_tree =
device_get_sysctl_tree(accel_dev->accel_pci_dev.pci_dev);
rc = SYSCTL_ADD_UINT(qat_hb_sysctl_ctx,
SYSCTL_CHILDREN(qat_hb_sysctl_tree),
OID_AUTO,
"heartbeat_sent",
CTLFLAG_RD,
&hb->hb_sent_counter,
0,
"HB sent count");
HB_SYSCTL_ERR(rc);
hb->heartbeat_sent.oid =
SYSCTL_ADD_UINT(qat_hb_sysctl_ctx,
SYSCTL_CHILDREN(qat_hb_sysctl_tree),
OID_AUTO,
"heartbeat_sent",
CTLFLAG_RD,
&hb->hb_sent_counter,
0,
"HB sent count");
HB_SYSCTL_ERR(hb->heartbeat_sent.oid);
rc = SYSCTL_ADD_UINT(qat_hb_sysctl_ctx,
SYSCTL_CHILDREN(qat_hb_sysctl_tree),
OID_AUTO,
"heartbeat_failed",
CTLFLAG_RD,
&hb->hb_failed_counter,
0,
"HB failed count");
HB_SYSCTL_ERR(rc);
hb->heartbeat_failed.oid =
SYSCTL_ADD_UINT(qat_hb_sysctl_ctx,
SYSCTL_CHILDREN(qat_hb_sysctl_tree),
OID_AUTO,
"heartbeat_failed",
CTLFLAG_RD,
&hb->hb_failed_counter,
0,
"HB failed count");
HB_SYSCTL_ERR(hb->heartbeat_failed.oid);
rc = SYSCTL_ADD_PROC(qat_hb_sysctl_ctx,
SYSCTL_CHILDREN(qat_hb_sysctl_tree),
OID_AUTO,
"heartbeat",
CTLTYPE_INT | CTLFLAG_RD,
accel_dev,
0,
qat_dev_hb_read,
"IU",
"QAT device status");
HB_SYSCTL_ERR(rc);
hb->heartbeat.oid = SYSCTL_ADD_PROC(qat_hb_sysctl_ctx,
SYSCTL_CHILDREN(qat_hb_sysctl_tree),
OID_AUTO,
"heartbeat",
CTLTYPE_INT | CTLFLAG_RD,
accel_dev,
0,
qat_dev_hb_read,
"IU",
"QAT device status");
HB_SYSCTL_ERR(hb->heartbeat.oid);
return 0;
}
int
adf_heartbeat_dbg_del(struct adf_accel_dev *accel_dev)
{
struct sysctl_ctx_list *qat_sysctl_ctx;
struct adf_heartbeat *hb;
if (!accel_dev) {
return EINVAL;
}
hb = accel_dev->heartbeat;
qat_sysctl_ctx =
device_get_sysctl_ctx(accel_dev->accel_pci_dev.pci_dev);
if (hb->heartbeat.oid) {
sysctl_ctx_entry_del(qat_sysctl_ctx, hb->heartbeat.oid);
sysctl_remove_oid(hb->heartbeat.oid, 1, 1);
hb->heartbeat.oid = NULL;
}
if (hb->heartbeat_failed.oid) {
sysctl_ctx_entry_del(qat_sysctl_ctx, hb->heartbeat_failed.oid);
sysctl_remove_oid(hb->heartbeat_failed.oid, 1, 1);
hb->heartbeat_failed.oid = NULL;
}
if (hb->heartbeat_sent.oid) {
sysctl_ctx_entry_del(qat_sysctl_ctx, hb->heartbeat_sent.oid);
sysctl_remove_oid(hb->heartbeat_sent.oid, 1, 1);
hb->heartbeat_sent.oid = NULL;
}
adf_heartbeat_clean(accel_dev);
return 0;
}

98
sys/dev/qat/qat_common/adf_freebsd_ver_dbg.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_freebsd.h"
#include "adf_cfg.h"
#include "adf_common_drv.h"
@ -86,7 +86,6 @@ adf_ver_dbg_add(struct adf_accel_dev *accel_dev)
{
struct sysctl_ctx_list *qat_sysctl_ctx;
struct sysctl_oid *qat_sysctl_tree;
struct sysctl_oid *rc = 0;
if (!accel_dev)
return -EINVAL;
@ -96,43 +95,46 @@ adf_ver_dbg_add(struct adf_accel_dev *accel_dev)
qat_sysctl_tree =
device_get_sysctl_tree(accel_dev->accel_pci_dev.pci_dev);
rc = SYSCTL_ADD_OID(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_sysctl_tree),
OID_AUTO,
"fw_version",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
adf_sysctl_read_fw_versions,
"A",
"QAT FW version");
if (!rc)
accel_dev->fw_version_oid =
SYSCTL_ADD_OID(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_sysctl_tree),
OID_AUTO,
"fw_version",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
adf_sysctl_read_fw_versions,
"A",
"QAT FW version");
if (!accel_dev->fw_version_oid)
goto err;
rc = SYSCTL_ADD_OID(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_sysctl_tree),
OID_AUTO,
"hw_version",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
adf_sysctl_read_hw_versions,
"A",
"QAT HW version");
if (!rc)
accel_dev->hw_version_oid =
SYSCTL_ADD_OID(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_sysctl_tree),
OID_AUTO,
"hw_version",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
adf_sysctl_read_hw_versions,
"A",
"QAT HW version");
if (!accel_dev->hw_version_oid)
goto err;
rc = SYSCTL_ADD_OID(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_sysctl_tree),
OID_AUTO,
"mmp_version",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
adf_sysctl_read_mmp_versions,
"A",
"QAT MMP version");
if (!rc)
accel_dev->mmp_version_oid =
SYSCTL_ADD_OID(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_sysctl_tree),
OID_AUTO,
"mmp_version",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
adf_sysctl_read_mmp_versions,
"A",
"QAT MMP version");
if (!accel_dev->mmp_version_oid)
goto err;
return 0;
@ -145,4 +147,30 @@ err:
void
adf_ver_dbg_del(struct adf_accel_dev *accel_dev)
{
struct sysctl_ctx_list *qat_sysctl_ctx;
if (!accel_dev)
return;
qat_sysctl_ctx =
device_get_sysctl_ctx(accel_dev->accel_pci_dev.pci_dev);
if (accel_dev->mmp_version_oid) {
sysctl_ctx_entry_del(qat_sysctl_ctx,
accel_dev->mmp_version_oid);
sysctl_remove_oid(accel_dev->mmp_version_oid, 1, 1);
accel_dev->mmp_version_oid = NULL;
}
if (accel_dev->hw_version_oid) {
sysctl_ctx_entry_del(qat_sysctl_ctx, accel_dev->hw_version_oid);
sysctl_remove_oid(accel_dev->hw_version_oid, 1, 1);
accel_dev->hw_version_oid = NULL;
}
if (accel_dev->fw_version_oid) {
sysctl_ctx_entry_del(qat_sysctl_ctx, accel_dev->fw_version_oid);
sysctl_remove_oid(accel_dev->fw_version_oid, 1, 1);
accel_dev->fw_version_oid = NULL;
}
}

42
sys/dev/qat/qat_common/adf_fw_counters.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include <sys/types.h>
#include <sys/sysctl.h>
#include <sys/systm.h>
@ -211,7 +211,6 @@ adf_fw_counters_add(struct adf_accel_dev *accel_dev)
struct adf_fw_counters_data *fw_counters_data;
struct sysctl_ctx_list *qat_sysctl_ctx;
struct sysctl_oid *qat_sysctl_tree;
struct sysctl_oid *rc = 0;
fw_counters_data =
malloc(sizeof(*fw_counters_data), M_QAT, M_WAITOK | M_ZERO);
@ -225,20 +224,24 @@ adf_fw_counters_add(struct adf_accel_dev *accel_dev)
device_get_sysctl_ctx(accel_dev->accel_pci_dev.pci_dev);
qat_sysctl_tree =
device_get_sysctl_tree(accel_dev->accel_pci_dev.pci_dev);
rc = SYSCTL_ADD_OID(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_sysctl_tree),
OID_AUTO,
"fw_counters",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
adf_read_fw_counters,
"A",
"QAT FW counters");
if (!rc)
fw_counters_data->debug =
SYSCTL_ADD_OID(qat_sysctl_ctx,
SYSCTL_CHILDREN(qat_sysctl_tree),
OID_AUTO,
"fw_counters",
CTLTYPE_STRING | CTLFLAG_RD,
accel_dev,
0,
adf_read_fw_counters,
"A",
"QAT FW counters");
if (!fw_counters_data->debug) {
free(fw_counters_data, M_QAT);
accel_dev->fw_counters_data = NULL;
return ENOMEM;
else
return 0;
}
return 0;
}
static void
@ -396,12 +399,21 @@ adf_fw_counters_section_add(struct adf_accel_dev *accel_dev,
void
adf_fw_counters_remove(struct adf_accel_dev *accel_dev)
{
struct sysctl_ctx_list *qat_sysctl_ctx;
struct adf_fw_counters_data *fw_counters_data =
accel_dev->fw_counters_data;
if (!fw_counters_data)
return;
if (fw_counters_data->debug) {
qat_sysctl_ctx =
device_get_sysctl_ctx(accel_dev->accel_pci_dev.pci_dev);
sysctl_ctx_entry_del(qat_sysctl_ctx, fw_counters_data->debug);
sysctl_remove_oid(fw_counters_data->debug, 1, 1);
fw_counters_data->debug = NULL;
}
down_write(&fw_counters_data->lock);
adf_fw_counters_section_del_all(&fw_counters_data->ae_sec_list);
up_write(&fw_counters_data->lock);

7
sys/dev/qat/qat_common/adf_init.c
View file

@ -1,8 +1,9 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_freebsd.h"
#include "adf_cfg.h"
#include "adf_common_drv.h"
#include "adf_dbgfs.h"
#include "adf_accel_devices.h"
#include "icp_qat_uclo.h"
#include "icp_qat_fw.h"
@ -489,6 +490,8 @@ adf_dev_start(struct adf_accel_dev *accel_dev)
clear_bit(ADF_STATUS_STARTING, &accel_dev->status);
set_bit(ADF_STATUS_STARTED, &accel_dev->status);
adf_dbgfs_add(accel_dev);
return 0;
}
@ -526,6 +529,8 @@ adf_dev_stop(struct adf_accel_dev *accel_dev)
return EBUSY;
}
adf_dbgfs_rm(accel_dev);
clear_bit(ADF_STATUS_STARTING, &accel_dev->status);
clear_bit(ADF_STATUS_STARTED, &accel_dev->status);

8
sys/dev/qat/qat_hw/qat_200xx/adf_drv.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_freebsd.h"
#include "adf_cfg.h"
#include "adf_common_drv.h"
@ -7,13 +7,12 @@
#include "adf_200xx_hw_data.h"
#include "adf_fw_counters.h"
#include "adf_cfg_device.h"
#include "adf_dbgfs.h"
#include <sys/types.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus_dma.h>
#include <dev/pci/pcireg.h>
#include "adf_heartbeat_dbg.h"
#include "adf_cnvnr_freq_counters.h"
static MALLOC_DEFINE(M_QAT_200XX, "qat_200xx", "qat_200xx");
@ -73,6 +72,7 @@ adf_cleanup_accel(struct adf_accel_dev *accel_dev)
free(accel_dev->hw_device, M_QAT_200XX);
accel_dev->hw_device = NULL;
}
adf_dbgfs_exit(accel_dev);
adf_cfg_dev_remove(accel_dev);
adf_devmgr_rm_dev(accel_dev, NULL);
}
@ -215,6 +215,8 @@ adf_attach(device_t dev)
}
pci_enable_busmaster(dev);
adf_dbgfs_init(accel_dev);
if (!accel_dev->hw_device->config_device) {
ret = EFAULT;
goto out_err;

8
sys/dev/qat/qat_hw/qat_4xxx/adf_drv.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007 - 2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_freebsd.h"
#include "adf_cfg.h"
#include "adf_common_drv.h"
@ -8,13 +8,12 @@
#include "adf_gen4_hw_data.h"
#include "adf_fw_counters.h"
#include "adf_cfg_device.h"
#include "adf_dbgfs.h"
#include <sys/types.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus_dma.h>
#include <dev/pci/pcireg.h>
#include "adf_heartbeat_dbg.h"
#include "adf_cnvnr_freq_counters.h"
static MALLOC_DEFINE(M_QAT_4XXX, "qat_4xxx", "qat_4xxx");
@ -147,6 +146,7 @@ adf_cleanup_accel(struct adf_accel_dev *accel_dev)
#ifdef QAT_DISABLE_SAFE_DC_MODE
adf_4xxx_disable_safe_dc_sysctl_remove(accel_dev);
#endif /* QAT_DISABLE_SAFE_DC_MODE */
adf_dbgfs_exit(accel_dev);
adf_cfg_dev_remove(accel_dev);
adf_devmgr_rm_dev(accel_dev, NULL);
}
@ -280,6 +280,8 @@ adf_attach(device_t dev)
}
pci_enable_busmaster(dev);
adf_dbgfs_init(accel_dev);
if (!accel_dev->hw_device->config_device) {
ret = EFAULT;
goto out_err;

6
sys/dev/qat/qat_hw/qat_4xxxvf/adf_drv.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_freebsd.h"
#include <adf_accel_devices.h>
#include <adf_common_drv.h>
@ -8,6 +8,7 @@
#include "adf_gen4_hw_data.h"
#include "adf_fw_counters.h"
#include "adf_cfg_device.h"
#include "adf_dbgfs.h"
#include <sys/types.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
@ -83,6 +84,7 @@ adf_cleanup_accel(struct adf_accel_dev *accel_dev)
free(accel_dev->hw_device, M_QAT_4XXXVF);
accel_dev->hw_device = NULL;
}
adf_dbgfs_exit(accel_dev);
adf_cfg_dev_remove(accel_dev);
}
@ -180,6 +182,8 @@ adf_attach(device_t dev)
}
pci_enable_busmaster(dev);
adf_dbgfs_init(accel_dev);
/* Completion for VF2PF request/response message exchange */
init_completion(&accel_dev->u1.vf.msg_received);
mutex_init(&accel_dev->u1.vf.rpreset_lock);

8
sys/dev/qat/qat_hw/qat_c3xxx/adf_drv.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_freebsd.h"
#include "adf_cfg.h"
#include "adf_common_drv.h"
@ -7,13 +7,12 @@
#include "adf_c3xxx_hw_data.h"
#include "adf_fw_counters.h"
#include "adf_cfg_device.h"
#include "adf_dbgfs.h"
#include <sys/types.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus_dma.h>
#include <dev/pci/pcireg.h>
#include "adf_heartbeat_dbg.h"
#include "adf_cnvnr_freq_counters.h"
static MALLOC_DEFINE(M_QAT_C3XXX, "qat_c3xxx", "qat_c3xxx");
@ -73,6 +72,7 @@ adf_cleanup_accel(struct adf_accel_dev *accel_dev)
free(accel_dev->hw_device, M_QAT_C3XXX);
accel_dev->hw_device = NULL;
}
adf_dbgfs_exit(accel_dev);
adf_cfg_dev_remove(accel_dev);
adf_devmgr_rm_dev(accel_dev, NULL);
}
@ -204,6 +204,8 @@ adf_attach(device_t dev)
}
pci_enable_busmaster(dev);
adf_dbgfs_init(accel_dev);
if (!accel_dev->hw_device->config_device) {
ret = EFAULT;
goto out_err;

8
sys/dev/qat/qat_hw/qat_c4xxx/adf_drv.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_freebsd.h"
#include "adf_cfg.h"
#include "adf_common_drv.h"
@ -7,13 +7,12 @@
#include "adf_c4xxx_hw_data.h"
#include "adf_fw_counters.h"
#include "adf_cfg_device.h"
#include "adf_dbgfs.h"
#include <sys/types.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus_dma.h>
#include <dev/pci/pcireg.h>
#include "adf_heartbeat_dbg.h"
#include "adf_cnvnr_freq_counters.h"
static MALLOC_DEFINE(M_QAT_C4XXX, "qat_c4xx", "qat_c4xx");
@ -73,6 +72,7 @@ adf_cleanup_accel(struct adf_accel_dev *accel_dev)
free(accel_dev->hw_device, M_QAT_C4XXX);
accel_dev->hw_device = NULL;
}
adf_dbgfs_exit(accel_dev);
adf_cfg_dev_remove(accel_dev);
adf_devmgr_rm_dev(accel_dev, NULL);
}
@ -203,6 +203,8 @@ adf_attach(device_t dev)
}
pci_enable_busmaster(dev);
adf_dbgfs_init(accel_dev);
if (!accel_dev->hw_device->config_device) {
ret = EFAULT;
goto out_err;

8
sys/dev/qat/qat_hw/qat_c62x/adf_drv.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_freebsd.h"
#include "adf_cfg.h"
#include "adf_common_drv.h"
@ -7,13 +7,12 @@
#include "adf_c62x_hw_data.h"
#include "adf_fw_counters.h"
#include "adf_cfg_device.h"
#include "adf_dbgfs.h"
#include <sys/types.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus_dma.h>
#include <dev/pci/pcireg.h>
#include "adf_heartbeat_dbg.h"
#include "adf_cnvnr_freq_counters.h"
static MALLOC_DEFINE(M_QAT_C62X, "qat_c62x", "qat_c62x");
@ -73,6 +72,7 @@ adf_cleanup_accel(struct adf_accel_dev *accel_dev)
free(accel_dev->hw_device, M_QAT_C62X);
accel_dev->hw_device = NULL;
}
adf_dbgfs_exit(accel_dev);
adf_cfg_dev_remove(accel_dev);
adf_devmgr_rm_dev(accel_dev, NULL);
}
@ -205,6 +205,8 @@ adf_attach(device_t dev)
}
pci_enable_busmaster(dev);
adf_dbgfs_init(accel_dev);
if (!accel_dev->hw_device->config_device) {
ret = EFAULT;
goto out_err;

8
sys/dev/qat/qat_hw/qat_dh895xcc/adf_drv.c
View file

@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/* Copyright(c) 2007-2022 Intel Corporation */
/* Copyright(c) 2007-2025 Intel Corporation */
#include "qat_freebsd.h"
#include "adf_cfg.h"
#include "adf_common_drv.h"
@ -7,13 +7,12 @@
#include "adf_dh895xcc_hw_data.h"
#include "adf_fw_counters.h"
#include "adf_cfg_device.h"
#include "adf_dbgfs.h"
#include <sys/types.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <machine/bus_dma.h>
#include <dev/pci/pcireg.h>
#include "adf_heartbeat_dbg.h"
#include "adf_cnvnr_freq_counters.h"
static MALLOC_DEFINE(M_QAT_DH895XCC, "qat_dh895xcc", "qat_dh895xcc");
@ -73,6 +72,7 @@ adf_cleanup_accel(struct adf_accel_dev *accel_dev)
free(accel_dev->hw_device, M_QAT_DH895XCC);
accel_dev->hw_device = NULL;
}
adf_dbgfs_exit(accel_dev);
adf_cfg_dev_remove(accel_dev);
adf_devmgr_rm_dev(accel_dev, NULL);
}
@ -193,6 +193,8 @@ adf_attach(device_t dev)
}
pci_enable_busmaster(dev);
adf_dbgfs_init(accel_dev);
if (!accel_dev->hw_device->config_device) {
ret = EFAULT;
goto out_err;

1
sys/modules/qat/qat_common/Makefile
View file

@ -22,6 +22,7 @@ SRCS+= adf_pfvf_utils.c adf_pfvf_vf_msg.c adf_pfvf_vf_proto.c
SRCS+= adf_gen4vf_hw_csr_data.c
SRCS+= adf_freebsd_transport_debug.c adf_clock.c
SRCS+= adf_freebsd_cnvnr_ctrs_dbg.c
SRCS+= adf_freebsd_dbgfs.c
SRCS+= adf_freebsd_pfvf_ctrs_dbg.c
SRCS+= bus_if.h device_if.h pci_if.h vnode_if.h opt_qat.h