upstream/opnsense-src
1
0
Fork 0
mirror of https://github.com/opnsense/src.git synced 2026-06-09 00:32:25 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

MFi386: r254619

Browse source 
Reimplement atomic_load_acq_64() and atomic_store_rel_64() for i386.

Noticed by:	tinderbox
This commit is contained in:
Jung-uk Kim 2013-08-22 16:39:59 +00:00
parent 4d5c7c633b
commit c01bf4edad
1 changed files with 0 additions and 17 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

17
sys/pc98/pc98/machdep.c
View file

@ -1359,21 +1359,6 @@ idle_sysctl(SYSCTL_HANDLER_ARGS)
SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
idle_sysctl, "A", "currently selected idle function");
uint64_t (*atomic_load_acq_64)(volatile uint64_t *) =
atomic_load_acq_64_i386;
void (*atomic_store_rel_64)(volatile uint64_t *, uint64_t) =
atomic_store_rel_64_i386;
static void
cpu_probe_cmpxchg8b(void)
{
if ((cpu_feature & CPUID_CX8) != 0) {
atomic_load_acq_64 = atomic_load_acq_64_i586;
atomic_store_rel_64 = atomic_store_rel_64_i586;
}
}
/*
* Reset registers to default values on exec.
*/
@ -2422,8 +2407,6 @@ init386(first)
thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
thread0.td_pcb->pcb_ext = 0;
thread0.td_frame = &proc0_tf;
cpu_probe_cmpxchg8b();
}
void