arm64: Fix the TCR_EPD0 definition

Sponsored by:	Arm Ltd

(cherry picked from commit 8f26d01f53316c055cc1116eb56ff438da50d831)
This commit is contained in:
Andrew Turner 2023-09-06 18:32:15 +01:00
parent a9600913b4
commit bcedcc2aad

View file

@ -2167,7 +2167,7 @@
#define TCR_IRGN0_SHIFT 8
#define TCR_IRGN0_WBWA (1UL << TCR_IRGN0_SHIFT)
#define TCR_EPD0_SHIFT 7
#define TCR_EPD0 (1UL << TCR_EPD1_SHIFT)
#define TCR_EPD0 (1UL << TCR_EPD0_SHIFT)
/* Bit 6 is reserved */
#define TCR_T0SZ_SHIFT 0
#define TCR_T0SZ_MASK 0x3f