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ixgbe: update if_ix and ixgbe api with ix-3.3.38 changes

Browse source 
(cherry picked from commit f72de14ea13259db78b06c50da6c864dea698668)
This commit is contained in:
Kevin Bowling 2024-09-21 02:51:24 -07:00
parent 09c658172a
commit b8c2ff930b
9 changed files with 378 additions and 36 deletions
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172
sys/dev/ixgbe/if_ix.c
View file

@ -172,6 +172,7 @@ static void ixgbe_add_media_types(if_ctx_t);
static void ixgbe_update_stats_counters(struct ixgbe_softc *);
static void ixgbe_config_link(if_ctx_t);
static void ixgbe_get_slot_info(struct ixgbe_softc *);
static void ixgbe_fw_mode_timer(void *);
static void ixgbe_check_wol_support(struct ixgbe_softc *);
static void ixgbe_enable_rx_drop(struct ixgbe_softc *);
static void ixgbe_disable_rx_drop(struct ixgbe_softc *);
@ -1141,6 +1142,17 @@ ixgbe_if_attach_post(if_ctx_t ctx)
/* Add sysctls */
ixgbe_add_device_sysctls(ctx);
/* Init recovery mode timer and state variable */
if (sc->feat_en & IXGBE_FEATURE_RECOVERY_MODE) {
sc->recovery_mode = 0;
/* Set up the timer callout */
callout_init(&sc->fw_mode_timer, true);
/* Start the task */
callout_reset(&sc->fw_mode_timer, hz, ixgbe_fw_mode_timer, 0);
}
return (0);
err:
return (error);
@ -1639,10 +1651,10 @@ ixgbe_add_hw_stats(struct ixgbe_softc *sc)
queue_list = SYSCTL_CHILDREN(queue_node);
SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head",
CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, txr, 0,
CTLTYPE_UINT | CTLFLAG_RD, txr, 0,
ixgbe_sysctl_tdh_handler, "IU", "Transmit Descriptor Head");
SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_tail",
CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, txr, 0,
CTLTYPE_UINT | CTLFLAG_RD, txr, 0,
ixgbe_sysctl_tdt_handler, "IU", "Transmit Descriptor Tail");
SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tso_tx",
CTLFLAG_RD, &txr->tso_tx, "TSO");
@ -1659,7 +1671,7 @@ ixgbe_add_hw_stats(struct ixgbe_softc *sc)
queue_list = SYSCTL_CHILDREN(queue_node);
SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "interrupt_rate",
CTLTYPE_UINT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
CTLTYPE_UINT | CTLFLAG_RW,
&sc->rx_queues[i], 0,
ixgbe_sysctl_interrupt_rate_handler, "IU",
"Interrupt Rate");
@ -1667,10 +1679,10 @@ ixgbe_add_hw_stats(struct ixgbe_softc *sc)
CTLFLAG_RD, &(sc->rx_queues[i].irqs),
"irqs on this queue");
SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head",
CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, rxr, 0,
CTLTYPE_UINT | CTLFLAG_RD, rxr, 0,
ixgbe_sysctl_rdh_handler, "IU", "Receive Descriptor Head");
SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_tail",
CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, rxr, 0,
CTLTYPE_UINT | CTLFLAG_RD, rxr, 0,
ixgbe_sysctl_rdt_handler, "IU", "Receive Descriptor Tail");
SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "rx_packets",
CTLFLAG_RD, &rxr->rx_packets, "Queue Packets Received");
@ -1799,6 +1811,10 @@ ixgbe_sysctl_tdh_handler(SYSCTL_HANDLER_ARGS)
if (!txr)
return (0);
if (atomic_load_acq_int(&txr->sc->recovery_mode))
return (EPERM);
val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDH(txr->me));
error = sysctl_handle_int(oidp, &val, 0, req);
if (error || !req->newptr)
@ -1822,6 +1838,9 @@ ixgbe_sysctl_tdt_handler(SYSCTL_HANDLER_ARGS)
if (!txr)
return (0);
if (atomic_load_acq_int(&txr->sc->recovery_mode))
return (EPERM);
val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDT(txr->me));
error = sysctl_handle_int(oidp, &val, 0, req);
if (error || !req->newptr)
@ -1845,6 +1864,9 @@ ixgbe_sysctl_rdh_handler(SYSCTL_HANDLER_ARGS)
if (!rxr)
return (0);
if (atomic_load_acq_int(&rxr->sc->recovery_mode))
return (EPERM);
val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDH(rxr->me));
error = sysctl_handle_int(oidp, &val, 0, req);
if (error || !req->newptr)
@ -1868,6 +1890,9 @@ ixgbe_sysctl_rdt_handler(SYSCTL_HANDLER_ARGS)
if (!rxr)
return (0);
if (atomic_load_acq_int(&rxr->sc->recovery_mode))
return (EPERM);
val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDT(rxr->me));
error = sysctl_handle_int(oidp, &val, 0, req);
if (error || !req->newptr)
@ -2158,6 +2183,7 @@ ixgbe_perform_aim(struct ixgbe_softc *sc, struct ix_rx_queue *que)
{
uint32_t newitr = 0;
struct rx_ring *rxr = &que->rxr;
/* FIXME struct tx_ring *txr = ... ->txr; */
/*
* Do Adaptive Interrupt Moderation:
@ -2173,12 +2199,18 @@ ixgbe_perform_aim(struct ixgbe_softc *sc, struct ix_rx_queue *que)
que->eitr_setting = 0;
/* Idle, do nothing */
if (rxr->bytes == 0) {
/* FIXME && txr->bytes == 0 */
return;
}
if ((rxr->bytes) && (rxr->packets)) {
newitr = (rxr->bytes / rxr->packets);
}
if ((rxr->bytes) && (rxr->packets))
newitr = rxr->bytes / rxr->packets;
/* FIXME for transmit accounting
* if ((txr->bytes) && (txr->packets))
* newitr = txr->bytes/txr->packets;
* if ((rxr->bytes) && (rxr->packets))
* newitr = max(newitr, (rxr->bytes / rxr->packets));
*/
newitr += 24; /* account for hardware frame, crc */
/* set an upper boundary */
@ -2201,6 +2233,8 @@ ixgbe_perform_aim(struct ixgbe_softc *sc, struct ix_rx_queue *que)
que->eitr_setting = newitr;
/* Reset state */
/* FIXME txr->bytes = 0; */
/* FIXME txr->packets = 0; */
rxr->bytes = 0;
rxr->packets = 0;
@ -2658,6 +2692,9 @@ ixgbe_sysctl_interrupt_rate_handler(SYSCTL_HANDLER_ARGS)
int error;
unsigned int reg, usec, rate;
if (atomic_load_acq_int(&que->sc->recovery_mode))
return (EPERM);
reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix));
usec = ((reg & 0x0FF8) >> 3);
if (usec > 0)
@ -2697,12 +2734,12 @@ ixgbe_add_device_sysctls(if_ctx_t ctx)
/* Sysctls for all devices */
SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fc",
CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
CTLTYPE_INT | CTLFLAG_RW,
sc, 0, ixgbe_sysctl_flowcntl, "I",
IXGBE_SYSCTL_DESC_SET_FC);
SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "advertise_speed",
CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
CTLTYPE_INT | CTLFLAG_RW,
sc, 0, ixgbe_sysctl_advertise, "I",
IXGBE_SYSCTL_DESC_ADV_SPEED);
@ -2711,35 +2748,35 @@ ixgbe_add_device_sysctls(if_ctx_t ctx)
&sc->enable_aim, 0, "Interrupt Moderation");
SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "fw_version",
CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0,
CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
ixgbe_sysctl_print_fw_version, "A", "Prints FW/NVM Versions");
#ifdef IXGBE_DEBUG
/* testing sysctls (for all devices) */
SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "power_state",
CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
CTLTYPE_INT | CTLFLAG_RW,
sc, 0, ixgbe_sysctl_power_state,
"I", "PCI Power State");
SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "print_rss_config",
CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0,
CTLTYPE_STRING | CTLFLAG_RD, sc, 0,
ixgbe_sysctl_print_rss_config, "A", "Prints RSS Configuration");
#endif
/* for X550 series devices */
if (hw->mac.type >= ixgbe_mac_X550)
SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "dmac",
CTLTYPE_U16 | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
CTLTYPE_U16 | CTLFLAG_RW,
sc, 0, ixgbe_sysctl_dmac,
"I", "DMA Coalesce");
/* for WoL-capable devices */
if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {
SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wol_enable",
CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
CTLTYPE_INT | CTLFLAG_RW, sc, 0,
ixgbe_sysctl_wol_enable, "I", "Enable/Disable Wake on LAN");
SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "wufc",
CTLTYPE_U32 | CTLFLAG_RW | CTLFLAG_NEEDGIANT,
CTLTYPE_U32 | CTLFLAG_RW,
sc, 0, ixgbe_sysctl_wufc,
"I", "Enable/Disable Wake Up Filters");
}
@ -2754,20 +2791,20 @@ ixgbe_add_device_sysctls(if_ctx_t ctx)
phy_list = SYSCTL_CHILDREN(phy_node);
SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO, "temp",
CTLTYPE_U16 | CTLFLAG_RD | CTLFLAG_NEEDGIANT,
CTLTYPE_U16 | CTLFLAG_RD,
sc, 0, ixgbe_sysctl_phy_temp,
"I", "Current External PHY Temperature (Celsius)");
SYSCTL_ADD_PROC(ctx_list, phy_list, OID_AUTO,
"overtemp_occurred",
CTLTYPE_U16 | CTLFLAG_RD | CTLFLAG_NEEDGIANT, sc, 0,
CTLTYPE_U16 | CTLFLAG_RD, sc, 0,
ixgbe_sysctl_phy_overtemp_occurred, "I",
"External PHY High Temperature Event Occurred");
}
if (sc->feat_cap & IXGBE_FEATURE_EEE) {
SYSCTL_ADD_PROC(ctx_list, child, OID_AUTO, "eee_state",
CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0,
CTLTYPE_INT | CTLFLAG_RW, sc, 0,
ixgbe_sysctl_eee_state, "I", "EEE Power Save State");
}
} /* ixgbe_add_device_sysctls */
@ -2831,6 +2868,8 @@ ixgbe_if_detach(if_ctx_t ctx)
ctrl_ext &= ~IXGBE_CTRL_EXT_DRV_LOAD;
IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext);
callout_drain(&sc->fw_mode_timer);
ixgbe_free_pci_resources(ctx);
free(sc->mta, M_IXGBE);
@ -3497,6 +3536,34 @@ ixgbe_if_timer(if_ctx_t ctx, uint16_t qid)
} /* ixgbe_if_timer */
/************************************************************************
* ixgbe_fw_mode_timer - FW mode timer routine
************************************************************************/
static void
ixgbe_fw_mode_timer(void *arg)
{
struct ixgbe_softc *sc = arg;
struct ixgbe_hw *hw = &sc->hw;
if (ixgbe_fw_recovery_mode(hw)) {
if (atomic_cmpset_acq_int(&sc->recovery_mode, 0, 1)) {
/* Firmware error detected, entering recovery mode */
device_printf(sc->dev, "Firmware recovery mode detected. Limiting"
" functionality. Refer to the Intel(R) Ethernet Adapters"
" and Devices User Guide for details on firmware recovery"
" mode.\n");
if (hw->adapter_stopped == FALSE)
ixgbe_if_stop(sc->ctx);
}
} else
atomic_cmpset_acq_int(&sc->recovery_mode, 1, 0);
callout_reset(&sc->fw_mode_timer, hz,
ixgbe_fw_mode_timer, sc);
} /* ixgbe_fw_mode_timer */
/************************************************************************
* ixgbe_sfp_probe
*
@ -3948,7 +4015,7 @@ ixgbe_intr(void *arg)
}
/* Check for fan failure */
if ((hw->device_id == IXGBE_DEV_ID_82598AT) &&
if ((sc->feat_en & IXGBE_FEATURE_FAN_FAIL) &&
(eicr & IXGBE_EICR_GPI_SDP1)) {
device_printf(sc->dev,
"\nCRITICAL: FAN FAILURE!! REPLACE IMMEDIATELY!!\n");
@ -4142,6 +4209,9 @@ ixgbe_sysctl_advertise(SYSCTL_HANDLER_ARGS)
int error, advertise;
sc = (struct ixgbe_softc *)arg1;
if (atomic_load_acq_int(&sc->recovery_mode))
return (EPERM);
advertise = sc->advertise;
error = sysctl_handle_int(oidp, &advertise, 0, req);
@ -4493,6 +4563,9 @@ ixgbe_sysctl_print_rss_config(SYSCTL_HANDLER_ARGS)
int error = 0, reta_size;
u32 reg;
if (atomic_load_acq_int(&sc->recovery_mode))
return (EPERM);
buf = sbuf_new_for_sysctl(NULL, NULL, 128, req);
if (!buf) {
device_printf(dev, "Could not allocate sbuf for output.\n");
@ -4548,6 +4621,9 @@ ixgbe_sysctl_phy_temp(SYSCTL_HANDLER_ARGS)
struct ixgbe_hw *hw = &sc->hw;
u16 reg;
if (atomic_load_acq_int(&sc->recovery_mode))
return (EPERM);
if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
device_printf(iflib_get_dev(sc->ctx),
"Device has no supported external thermal sensor.\n");
@ -4580,6 +4656,9 @@ ixgbe_sysctl_phy_overtemp_occurred(SYSCTL_HANDLER_ARGS)
struct ixgbe_hw *hw = &sc->hw;
u16 reg;
if (atomic_load_acq_int(&sc->recovery_mode))
return (EPERM);
if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {
device_printf(iflib_get_dev(sc->ctx),
"Device has no supported external thermal sensor.\n");
@ -4617,6 +4696,9 @@ ixgbe_sysctl_eee_state(SYSCTL_HANDLER_ARGS)
int curr_eee, new_eee, error = 0;
s32 retval;
if (atomic_load_acq_int(&sc->recovery_mode))
return (EPERM);
curr_eee = new_eee = !!(sc->feat_en & IXGBE_FEATURE_EEE);
error = sysctl_handle_int(oidp, &new_eee, 0, req);
@ -4681,15 +4763,20 @@ ixgbe_init_device_features(struct ixgbe_softc *sc)
sc->feat_cap |= IXGBE_FEATURE_BYPASS;
break;
case ixgbe_mac_X550:
sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE;
sc->feat_cap |= IXGBE_FEATURE_TEMP_SENSOR;
sc->feat_cap |= IXGBE_FEATURE_SRIOV;
sc->feat_cap |= IXGBE_FEATURE_FDIR;
break;
case ixgbe_mac_X550EM_x:
sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE;
sc->feat_cap |= IXGBE_FEATURE_SRIOV;
sc->feat_cap |= IXGBE_FEATURE_FDIR;
if (sc->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR)
sc->feat_cap |= IXGBE_FEATURE_EEE;
break;
case ixgbe_mac_X550EM_a:
sc->feat_cap |= IXGBE_FEATURE_RECOVERY_MODE;
sc->feat_cap |= IXGBE_FEATURE_SRIOV;
sc->feat_cap |= IXGBE_FEATURE_FDIR;
sc->feat_cap &= ~IXGBE_FEATURE_LEGACY_IRQ;
@ -4725,6 +4812,9 @@ ixgbe_init_device_features(struct ixgbe_softc *sc)
/* Thermal Sensor */
if (sc->feat_cap & IXGBE_FEATURE_TEMP_SENSOR)
sc->feat_en |= IXGBE_FEATURE_TEMP_SENSOR;
/* Recovery mode */
if (sc->feat_cap & IXGBE_FEATURE_RECOVERY_MODE)
sc->feat_en |= IXGBE_FEATURE_RECOVERY_MODE;
/* Enabled via global sysctl... */
/* Flow Director */
@ -4776,14 +4866,42 @@ static void
ixgbe_sbuf_fw_version(struct ixgbe_hw *hw, struct sbuf *buf)
{
struct ixgbe_nvm_version nvm_ver = {0};
uint16_t phyfw = 0;
int status;
const char *space = "";
ixgbe_get_nvm_version(hw, &nvm_ver); /* NVM version */
ixgbe_get_oem_prod_version(hw, &nvm_ver); /* OEM's NVM version */
ixgbe_get_orom_version(hw, &nvm_ver); /* Option ROM */
ixgbe_get_etk_id(hw, &nvm_ver); /* eTrack identifies a build in Intel's SCM */
status = ixgbe_get_phy_firmware_version(hw, &phyfw);
ixgbe_get_orom_version(hw, &nvm_ver); /* Option ROM */
/* FW version */
if ((nvm_ver.phy_fw_maj == 0x0 &&
nvm_ver.phy_fw_min == 0x0 &&
nvm_ver.phy_fw_id == 0x0) ||
(nvm_ver.phy_fw_maj == 0xF &&
nvm_ver.phy_fw_min == 0xFF &&
nvm_ver.phy_fw_id == 0xF)) {
/* If major, minor and id numbers are set to 0,
* reading FW version is unsupported. If major number
* is set to 0xF, minor is set to 0xFF and id is set
* to 0xF, this means that number read is invalid. */
} else
sbuf_printf(buf, "fw %d.%d.%d ",
nvm_ver.phy_fw_maj, nvm_ver.phy_fw_min, nvm_ver.phy_fw_id);
/* NVM version */
if ((nvm_ver.nvm_major == 0x0 &&
nvm_ver.nvm_minor == 0x0 &&
nvm_ver.nvm_id == 0x0) ||
(nvm_ver.nvm_major == 0xF &&
nvm_ver.nvm_minor == 0xFF &&
nvm_ver.nvm_id == 0xF)) {
/* If major, minor and id numbers are set to 0,
* reading NVM version is unsupported. If major number
* is set to 0xF, minor is set to 0xFF and id is set
* to 0xF, this means that number read is invalid. */
} else
sbuf_printf(buf, "nvm %x.%02x.%x ",
nvm_ver.nvm_major, nvm_ver.nvm_minor, nvm_ver.nvm_id);
if (nvm_ver.oem_valid) {
sbuf_printf(buf, "NVM OEM V%d.%d R%d", nvm_ver.oem_major,
@ -4798,13 +4916,9 @@ ixgbe_sbuf_fw_version(struct ixgbe_hw *hw, struct sbuf *buf)
}
if (nvm_ver.etk_id != ((NVM_VER_INVALID << NVM_ETK_SHIFT) |
NVM_VER_INVALID)) {
NVM_VER_INVALID | 0xFFFFFFFF)) {
sbuf_printf(buf, "%seTrack 0x%08x", space, nvm_ver.etk_id);
space = " ";
}
if (phyfw != 0 && status == IXGBE_SUCCESS)
sbuf_printf(buf, "%sPHY FW V%d", space, phyfw);
} /* ixgbe_sbuf_fw_version */
/************************************************************************

4
sys/dev/ixgbe/ixgbe.h
View file

@ -434,6 +434,10 @@ struct ixgbe_softc {
/* Bypass */
struct ixgbe_bp_data bypass;
/* Firmware error check */
int recovery_mode;
struct callout fw_mode_timer;
/* Misc stats maintained by the driver */
unsigned long dropped_pkts;
unsigned long mbuf_header_failed;

19
sys/dev/ixgbe/ixgbe_api.c
View file

@ -1133,6 +1133,19 @@ s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_toggle_txdctl - Toggle VF's queues
* @hw: pointer to hardware structure
* @vind: VMDq pool index
*
* Enable and disable each queue in VF.
*/
s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind)
{
return ixgbe_call_func(hw, hw->mac.ops.toggle_txdctl, (hw,
vind), IXGBE_NOT_IMPLEMENTED);
}
/**
* ixgbe_fc_enable - Enable flow control
* @hw: pointer to hardware structure
@ -1417,15 +1430,15 @@ s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status)
/**
* ixgbe_bypass_valid_rd - Verify valid return from bit-bang.
* @hw: pointer to hardware structure
* @in_reg: The register cmd for the bit-bang read.
* @out_reg: The register returned from a bit-bang read.
*
* If we send a write we can't be sure it took until we can read back
* that same register. It can be a problem as some of the fields may
* for valid reasons change inbetween the time wrote the register and
* we read it again to verify. So this function check everything we
* can check and then assumes it worked.
*
* @u32 in_reg - The register cmd for the bit-bang read.
* @u32 out_reg - The register returned from a bit-bang read.
**/
bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg)
{

1
sys/dev/ixgbe/ixgbe_api.h
View file

@ -131,6 +131,7 @@ s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
bool vlan_on, u32 *vfta_delta, u32 vfta,
bool vlvf_bypass);
s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind);
s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
s32 ixgbe_setup_fc(struct ixgbe_hw *hw);
s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,

161
sys/dev/ixgbe/ixgbe_common.c
View file

@ -133,6 +133,7 @@ s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw)
mac->ops.init_uta_tables = NULL;
mac->ops.enable_rx = ixgbe_enable_rx_generic;
mac->ops.disable_rx = ixgbe_disable_rx_generic;
mac->ops.toggle_txdctl = ixgbe_toggle_txdctl_generic;
/* Flow Control */
mac->ops.fc_enable = ixgbe_fc_enable_generic;
@ -4138,6 +4139,62 @@ s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw)
return IXGBE_SUCCESS;
}
/**
* ixgbe_toggle_txdctl_generic - Toggle VF's queues
* @hw: pointer to hardware structure
* @vf_number: VF index
*
* Enable and disable each queue in VF.
*/
s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vf_number)
{
u8 queue_count, i;
u32 offset, reg;
if (vf_number > 63)
return IXGBE_ERR_PARAM;
/*
* Determine number of queues by checking
* number of virtual functions
*/
reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
switch (reg & IXGBE_GCR_EXT_VT_MODE_MASK) {
case IXGBE_GCR_EXT_VT_MODE_64:
queue_count = 2;
break;
case IXGBE_GCR_EXT_VT_MODE_32:
queue_count = 4;
break;
case IXGBE_GCR_EXT_VT_MODE_16:
queue_count = 8;
break;
default:
return IXGBE_ERR_CONFIG;
}
/* Toggle queues */
for (i = 0; i < queue_count; ++i) {
/* Calculate offset of current queue */
offset = queue_count * vf_number + i;
/* Enable queue */
reg = IXGBE_READ_REG(hw, IXGBE_PVFTXDCTL(offset));
reg |= IXGBE_TXDCTL_ENABLE;
IXGBE_WRITE_REG(hw, IXGBE_PVFTXDCTL(offset), reg);
IXGBE_WRITE_FLUSH(hw);
/* Disable queue */
reg = IXGBE_READ_REG(hw, IXGBE_PVFTXDCTL(offset));
reg &= ~IXGBE_TXDCTL_ENABLE;
IXGBE_WRITE_REG(hw, IXGBE_PVFTXDCTL(offset), reg);
IXGBE_WRITE_FLUSH(hw);
}
return IXGBE_SUCCESS;
}
/**
* ixgbe_need_crosstalk_fix - Determine if we need to do cross talk fix
* @hw: pointer to hardware structure
@ -5151,15 +5208,14 @@ s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status)
/**
* ixgbe_bypass_valid_rd_generic - Verify valid return from bit-bang.
* @in_reg: The register cmd for the bit-bang read.
* @out_reg: The register returned from a bit-bang read.
*
* If we send a write we can't be sure it took until we can read back
* that same register. It can be a problem as some of the fields may
* for valid reasons change inbetween the time wrote the register and
* we read it again to verify. So this function check everything we
* can check and then assumes it worked.
*
* @u32 in_reg - The register cmd for the bit-bang read.
* @u32 out_reg - The register returned from a bit-bang read.
**/
bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)
{
@ -5210,7 +5266,7 @@ bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)
* ixgbe_bypass_set_generic - Set a bypass field in the FW CTRL Regiter.
*
* @hw: pointer to hardware structure
* @cmd: The control word we are setting.
* @ctrl: The control word we are setting.
* @event: The event we are setting in the FW. This also happens to
* be the mask for the event we are setting (handy)
* @action: The action we set the event to in the FW. This is in a
@ -5395,6 +5451,103 @@ void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver)
}
}
/**
* ixgbe_get_nvm_version - Return version of NVM and its components
*
* @hw: pointer to hardware structure
* @nvm_ver: pointer to output structure
*
* irrelevant component fields will return 0, read errors will return 0xff
**/
void ixgbe_get_nvm_version(struct ixgbe_hw *hw,
struct ixgbe_nvm_version *nvm_ver)
{
u16 word, phy_ver;
DEBUGFUNC("ixgbe_get_nvm_version");
memset(nvm_ver, 0, sizeof(struct ixgbe_nvm_version));
/* eeprom version is mac-type specific */
switch (hw->mac.type) {
case ixgbe_mac_82598EB:
/* version of eeprom section */
if (ixgbe_read_eeprom(hw, NVM_EEP_OFFSET_82598, &word))
word = NVM_VER_INVALID;
nvm_ver->nvm_major = ((word & NVM_EEP_MAJOR_MASK)
>> NVM_EEP_MAJ_SHIFT);
nvm_ver->nvm_minor = ((word & NVM_EEP_MINOR_MASK)
>> NVM_EEP_MIN_SHIFT);
nvm_ver->nvm_id = (word & NVM_EEP_ID_MASK);
break;
case ixgbe_mac_X540:
/* version of eeprom section */
if (ixgbe_read_eeprom(hw, NVM_EEP_OFFSET_X540, &word))
word = NVM_VER_INVALID;
nvm_ver->nvm_major = ((word & NVM_EEP_MAJOR_MASK)
>> NVM_EEP_MAJ_SHIFT);
nvm_ver->nvm_minor = ((word & NVM_EEP_MINOR_MASK)
>> NVM_EEP_MIN_SHIFT);
nvm_ver->nvm_id = (word & NVM_EEP_ID_MASK);
break;
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
/* version of eeprom section */
if (ixgbe_read_eeprom(hw, NVM_EEP_OFFSET_X540, &word))
word = NVM_VER_INVALID;
nvm_ver->nvm_major = ((word & NVM_EEP_MAJOR_MASK)
>> NVM_EEP_MAJ_SHIFT);
nvm_ver->nvm_minor = (word & NVM_EEP_X550_MINOR_MASK);
break;
default:
break;
}
/* phy version is mac-type specific */
switch (hw->mac.type) {
case ixgbe_mac_X540:
case ixgbe_mac_X550:
case ixgbe_mac_X550EM_x:
case ixgbe_mac_X550EM_a:
/* intel phy firmware version */
if (ixgbe_read_eeprom(hw, NVM_EEP_PHY_OFF_X540, &word))
word = NVM_VER_INVALID;
nvm_ver->phy_fw_maj = ((word & NVM_PHY_MAJOR_MASK)
>> NVM_PHY_MAJ_SHIFT);
nvm_ver->phy_fw_min = ((word & NVM_PHY_MINOR_MASK)
>> NVM_PHY_MIN_SHIFT);
nvm_ver->phy_fw_id = (word & NVM_PHY_ID_MASK);
break;
default:
break;
}
ixgbe_get_etk_id(hw, nvm_ver);
/* devstarter image */
if (ixgbe_read_eeprom(hw, NVM_DS_OFFSET, &word))
word = NVM_VER_INVALID;
nvm_ver->devstart_major = ((word & NVM_DS_MAJOR_MASK) >> NVM_DS_SHIFT);
nvm_ver->devstart_minor = (word & NVM_DS_MINOR_MASK);
/* OEM customization word */
if (ixgbe_read_eeprom(hw, NVM_OEM_OFFSET, &nvm_ver->oem_specific))
nvm_ver->oem_specific = NVM_VER_INVALID;
/* vendor (not intel) phy firmware version */
if (ixgbe_get_phy_firmware_version(hw, &phy_ver))
phy_ver = NVM_VER_INVALID;
nvm_ver->phy_vend_maj = ((phy_ver & NVM_PHYVEND_MAJOR_MASK)
>> NVM_PHYVEND_SHIFT);
nvm_ver->phy_vend_min = (phy_ver & NVM_PHYVEND_MINOR_MASK);
/* Option Rom may or may not be present. Start with pointer */
ixgbe_get_orom_version(hw, nvm_ver);
return;
}
/**
* ixgbe_dcb_get_rtrup2tc_generic - read rtrup2tc reg

3
sys/dev/ixgbe/ixgbe_common.h
View file

@ -141,6 +141,7 @@ s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
bool vlvf_bypass);
s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);
s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vind);
s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
ixgbe_link_speed *speed,
@ -195,6 +196,8 @@ void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
struct ixgbe_nvm_version *nvm_ver);
void ixgbe_get_orom_version(struct ixgbe_hw *hw,
struct ixgbe_nvm_version *nvm_ver);
void ixgbe_get_nvm_version(struct ixgbe_hw *hw,
struct ixgbe_nvm_version *nvm_ver);
void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,

1
sys/dev/ixgbe/ixgbe_features.h
View file

@ -56,6 +56,7 @@
#define IXGBE_FEATURE_EEE (u32)(1 << 11)
#define IXGBE_FEATURE_LEGACY_IRQ (u32)(1 << 12)
#define IXGBE_FEATURE_NEEDS_CTXD (u32)(1 << 13)
#define IXGBE_FEATURE_RECOVERY_MODE (u32)(1 << 15)
/* Check for OS support. Undefine features if not included in the OS */
#ifndef PCI_IOV

1
sys/dev/ixgbe/ixgbe_rss.h
View file

@ -48,6 +48,7 @@
#define RSS_HASHTYPE_RSS_IPV6_EX (1 << 5)
#define RSS_HASHTYPE_RSS_TCP_IPV6_EX (1 << 6)
#define RSS_HASHTYPE_RSS_UDP_IPV4 (1 << 7)
#define RSS_HASHTYPE_RSS_UDP_IPV4_EX (1 << 8)
#define RSS_HASHTYPE_RSS_UDP_IPV6 (1 << 9)
#define RSS_HASHTYPE_RSS_UDP_IPV6_EX (1 << 10)

52
sys/dev/ixgbe/ixgbe_type.h
View file

@ -202,6 +202,10 @@
#define IXGBE_FLA_X550EM_x IXGBE_FLA
#define IXGBE_FLA_X550EM_a 0x15F68
#define IXGBE_FLA_BY_MAC(_hw) IXGBE_BY_MAC((_hw), FLA)
#define IXGBE_FLA_FL_SIZE_SHIFT_X540 17
#define IXGBE_FLA_FL_SIZE_SHIFT_X550 12
#define IXGBE_FLA_FL_SIZE_MASK_X540 (0x7 << IXGBE_FLA_FL_SIZE_SHIFT_X540)
#define IXGBE_FLA_FL_SIZE_MASK_X550 (0x7 << IXGBE_FLA_FL_SIZE_SHIFT_X550)
#define IXGBE_EEMNGCTL 0x10110
#define IXGBE_EEMNGDATA 0x10114
@ -284,6 +288,41 @@
#define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OE_N_EN)
#define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT 500
/* NVM component version fields */
#define NVM_VERSZ_LONG 64
#define NVM_VERSZ_SHORT 32
#define NVM_VER_LONG \
"DS_%x.%x NVM_%x.%02x.%x PHY_%x.%02x.%x OEM_%04x EtkId_%x OR_%x.%x.%x\n"
#define NVM_VER_SHORT1 "%02x.%02x %x %x.%x.%x\n"
#define NVM_VER_SHORT2 "%02x.%02x.%x %x.%02x.%x %x %x.%x.%x\n"
#define NVM_EEP_MAJOR_MASK 0xF000
#define NVM_EEP_MINOR_MASK 0xFF0
#define NVM_EEP_ID_MASK 0xF
#define NVM_EEP_MAJ_SHIFT 12
#define NVM_EEP_MIN_SHIFT 4
#define NVM_EEP_OFFSET_82598 0x2A
#define NVM_EEP_OFFSET_X540 0x18
#define NVM_EEP_X550_MINOR_MASK 0xFF
#define NVM_EEP_PHY_OFF_X540 0x19
#define NVM_PHY_MAJOR_MASK 0xF000
#define NVM_PHY_MINOR_MASK 0xFF0
#define NVM_PHY_ID_MASK 0xF
#define NVM_PHY_MAJ_SHIFT 12
#define NVM_PHY_MIN_SHIFT 4
#define NVM_DS_OFFSET 0x29
#define NVM_DS_MAJOR_MASK 0xF000
#define NVM_DS_MINOR_MASK 0xF
#define NVM_DS_SHIFT 12
#define NVM_OEM_OFFSET 0x2A
#define NVM_PHYVEND_MAJOR_MASK 0xFF00
#define NVM_PHYVEND_MINOR_MASK 0xFF
#define NVM_PHYVEND_SHIFT 8
#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8
#define IXGBE_EMC_INTERNAL_DATA 0x00
#define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20
@ -344,6 +383,16 @@ struct ixgbe_nvm_version {
u16 or_build;
u8 or_patch;
u8 phy_fw_maj;
u16 phy_fw_min;
u8 phy_fw_id;
u8 devstart_major;
u8 devstart_minor;
u16 oem_specific;
u8 phy_vend_maj;
u8 phy_vend_min;
};
/* Interrupt Registers */
@ -1443,6 +1492,7 @@ struct ixgbe_dmac_config {
#define IXGBE_BARCTRL_FLSIZE 0x0700
#define IXGBE_BARCTRL_FLSIZE_SHIFT 8
#define IXGBE_BARCTRL_CSRSIZE 0x2000
#define IXGBE_BARCTRL_CSRSIZE_SHIFT 13
/* RSCCTL Bit Masks */
#define IXGBE_RSCCTL_RSCEN 0x01
@ -3414,6 +3464,7 @@ struct ixgbe_adv_tx_context_desc {
#define IXGBE_ADVTXD_POPTS_RSV 0x00002000 /* POPTS Reserved */
#define IXGBE_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */
#define IXGBE_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */
#define IXGBE_ADVTXD_MACLEN_MASK (0x7F << IXGBE_ADVTXD_MACLEN_SHIFT) /* Adv ctxt desc mac len mask */
#define IXGBE_ADVTXD_VLAN_SHIFT 16 /* Adv ctxt vlan tag shift */
#define IXGBE_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */
#define IXGBE_ADVTXD_TUCMD_IPV6 0x00000000 /* IP Packet Type: 0=IPv6 */
@ -4030,6 +4081,7 @@ struct ixgbe_mac_operations {
s32 (*init_uta_tables)(struct ixgbe_hw *);
void (*set_mac_anti_spoofing)(struct ixgbe_hw *, bool, int);
void (*set_vlan_anti_spoofing)(struct ixgbe_hw *, bool, int);
s32 (*toggle_txdctl)(struct ixgbe_hw *hw, u32 vf_index);
s32 (*update_xcast_mode)(struct ixgbe_hw *, int);
s32 (*set_rlpml)(struct ixgbe_hw *, u16);